Update copyright years and minor refactoring

Updating copyright year information and minor refactoring.
intel · Dec 22, 2023 · 0c9f429 · 0c9f429
1 parent 9a4665a
commit 0c9f429
Show file tree

Hide file tree

Showing 10 changed files with 16 additions and 13 deletions.
diff --git a/IGC/BiFModule/Headers/spirv.h b/IGC/BiFModule/Headers/spirv.h
@@ -1,6 +1,6 @@
 /*========================== begin_copyright_notice ============================
 
-Copyright (C) 2017-2021 Intel Corporation
+Copyright (C) 2017-2023 Intel Corporation
 
 SPDX-License-Identifier: MIT
 

diff --git a/IGC/BiFModule/Implementation/atomics.cl b/IGC/BiFModule/Implementation/atomics.cl
@@ -1,6 +1,6 @@
 /*========================== begin_copyright_notice ============================
 
-Copyright (C) 2017-2022 Intel Corporation
+Copyright (C) 2017-2023 Intel Corporation
 
 SPDX-License-Identifier: MIT
 

diff --git a/IGC/BiFModule/Languages/OpenCL/IBiF_Atomics.cl b/IGC/BiFModule/Languages/OpenCL/IBiF_Atomics.cl
@@ -1,6 +1,6 @@
 /*========================== begin_copyright_notice ============================
 
-Copyright (C) 2017-2021 Intel Corporation
+Copyright (C) 2017-2023 Intel Corporation
 
 SPDX-License-Identifier: MIT
 

diff --git a/IGC/Compiler/CISACodeGen/CheckInstrTypes.cpp b/IGC/Compiler/CISACodeGen/CheckInstrTypes.cpp
@@ -1,7 +1,7 @@
 
 /*========================== begin_copyright_notice ============================
 
-Copyright (C) 2017-2021 Intel Corporation
+Copyright (C) 2017-2023 Intel Corporation
 
 SPDX-License-Identifier: MIT
 

diff --git a/IGC/Compiler/CISACodeGen/EmitVISAPass.cpp b/IGC/Compiler/CISACodeGen/EmitVISAPass.cpp
@@ -14090,7 +14090,10 @@ void EmitPass::emitScalarAtomics(llvm::Instruction *pInst,
             m_encoder->Add(pSrcsArr[i], pSrcsArr[i], pReturnVal);
             m_encoder->Push();
 
-            if (atomic_op == EATOMIC_IADD || atomic_op == EATOMIC_IADD64 || atomic_op == EATOMIC_FADD || atomic_op == EATOMIC_FADD64)
+            if (atomic_op == EATOMIC_IADD ||
+                atomic_op == EATOMIC_IADD64 ||
+                atomic_op == EATOMIC_FADD ||
+                atomic_op == EATOMIC_FADD64)
             {
                 m_encoder->SetSrcModifier(1, EMOD_NEG);
             }

diff --git a/IGC/Compiler/CISACodeGen/helper.cpp b/IGC/Compiler/CISACodeGen/helper.cpp
@@ -1,6 +1,6 @@
 /*========================== begin_copyright_notice ============================
 
-Copyright (C) 2017-2021 Intel Corporation
+Copyright (C) 2017-2023 Intel Corporation
 
 SPDX-License-Identifier: MIT
 

diff --git a/IGC/Compiler/CodeGenPublicEnums.h b/IGC/Compiler/CodeGenPublicEnums.h
@@ -1,6 +1,6 @@
 /*========================== begin_copyright_notice ============================
 
-Copyright (C) 2017-2021 Intel Corporation
+Copyright (C) 2017-2023 Intel Corporation
 
 SPDX-License-Identifier: MIT
 

diff --git a/IGC/Compiler/Optimizer/OpenCLPasses/Atomics/OCLAtomicsDef.hpp b/IGC/Compiler/Optimizer/OpenCLPasses/Atomics/OCLAtomicsDef.hpp
@@ -1,6 +1,6 @@
 /*========================== begin_copyright_notice ============================
 
-Copyright (C) 2017-2021 Intel Corporation
+Copyright (C) 2017-2023 Intel Corporation
 
 SPDX-License-Identifier: MIT
 
@@ -123,4 +123,3 @@ DEF_OCL_IGC_ATOMIC("__builtin_IB_atomic_add_global_f32", EATOMIC_FADD, POINTER)
 DEF_OCL_IGC_ATOMIC("__builtin_IB_atomic_sub_global_f32", EATOMIC_FSUB, POINTER)
 DEF_OCL_IGC_ATOMIC("__builtin_IB_atomic_add_global_f64", EATOMIC_FADD64, POINTER)
 DEF_OCL_IGC_ATOMIC("__builtin_IB_atomic_cmpxchg_local_i64", EATOMIC_CMPXCHG64, POINTER)
-
diff --git a/IGC/Compiler/Optimizer/OpenCLPasses/LSCFuncs/LSCFuncsResolution.cpp b/IGC/Compiler/Optimizer/OpenCLPasses/LSCFuncs/LSCFuncsResolution.cpp
@@ -1000,7 +1000,8 @@ LscTypeInfo LSCFuncsResolution::decodeTypeInfoFromName()
 
 AtomicOp LSCFuncsResolution::decodeAtomicOpFromName()
 {
-    static const SymbolMapping symbols[42] {
+    static const uint32_t numSymbols = 42;
+    static const SymbolMapping symbols[numSymbols] {
         // FP 64 (local not suported)
         {"_add_global_double", EATOMIC_FADD64},
         {"_sub_global_double", EATOMIC_FSUB64},
@@ -1063,11 +1064,11 @@ AtomicOp LSCFuncsResolution::decodeAtomicOpFromName()
 
     // maybe a better way to do this, but the compiler seems to need an
     // explicit size for inference below.
-    static_assert(sizeof(symbols)/sizeof(symbols[0]) == 42);
+    static_assert(sizeof(symbols)/sizeof(symbols[0]) == numSymbols);
 
     AtomicOp atomicOp = EATOMIC_IADD;
     StringRef FN = m_pCurrInstFunc->getName();
-    if (!findFirstInfixMapping<AtomicOp,42>(FN, symbols, atomicOp)) {
+    if (!findFirstInfixMapping<AtomicOp, numSymbols>(FN, symbols, atomicOp)) {
         reportError("invalid lsc atomic operation");
     }
     return atomicOp;

diff --git a/IGC/Compiler/Optimizer/OpenCLPasses/StatelessToStateful/StatelessToStateful.cpp b/IGC/Compiler/Optimizer/OpenCLPasses/StatelessToStateful/StatelessToStateful.cpp
@@ -1,6 +1,6 @@
 /*========================== begin_copyright_notice ============================
 
-Copyright (C) 2017-2021 Intel Corporation
+Copyright (C) 2017-2023 Intel Corporation
 
 SPDX-License-Identifier: MIT