Add CMPccXADD and SW Prefetchi in cpuid_info data

SRF new instruction: CMPccXADD GNR new instruction: SW Prefetchi Signed-off-by: Xudong Hao <[email protected]>
intel · Aug 27, 2024 · 73c7f1c · 73c7f1c
1 parent 2e1bc06
commit 73c7f1c
Showing 1 changed file with 2 additions and 0 deletions.
diff --git a/BM/instruction-check/feature_list.py b/BM/instruction-check/feature_list.py
@@ -31,12 +31,14 @@
     "AMX_TILE": ['7', '0', '0', '0', 'd', '24'],
     "AMX_INT8": ['7', '0', '0', '0', 'd', '25'],
     "AVX_VNNI": ['7', '0', '1', '0', 'a', '4'],
+    "CMPCCXADD": ['7', '0', '1', '0', 'a', '7'],
     "FRED": ['7', '0', '1', '0', 'a', '17'],
     "WRMSRNS": ['7', '0', '1', '0', 'a', '19'],
     "AMX_FP16": ['7', '0', '1', '0', 'a', '21'],
     "AVX_IFMA": ['7', '0', '1', '0', 'a', '23'],
     "AVX_VNNI_INT8": ['7', '0', '1', '0', 'd', '4'],
     "AVX_NE_CONVERT": ['7', '0', '1', '0', 'd', '5'],
+    "PREFETCHI": ['7', '0', '1', '0', 'd', '14'],
     "XFD": ['d', '0', '1', '0', 'a', '4'],
     "KL_BITMAP0": ['19', '0', '0', '0', 'a', '0'],
     "KL_BITMAP1": ['19', '0', '0', '0', 'a', '1'],