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Fix intrinsics mismatch
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jiegec committed Dec 13, 2023
1 parent 47ea94e commit 329950b
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Showing 3 changed files with 8 additions and 7 deletions.
1 change: 1 addition & 0 deletions check_lsx.py
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,7 @@
# Update gh-pages before running:
# git fetch origin
# git worktree add -f ../gh-pages gh-pages
# git -C ../gh-pages reset origin/gh-pages --hard

# gcc intrinsics
gcc_intrinsics = set()
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10 changes: 5 additions & 5 deletions gcc_lsxintrin.h
Original file line number Diff line number Diff line change
Expand Up @@ -349,13 +349,13 @@ __m128i __lsx_vmin_d (__m128i, __m128i);
__m128i __lsx_vmin_du (__m128i, __m128i);
__m128i __lsx_vmin_h (__m128i, __m128i);
__m128i __lsx_vmin_hu (__m128i, __m128i);
__m128i __lsx_vmini_b (__m128i, imm_n16_15)
__m128i __lsx_vmini_b (__m128i, imm_n16_15);
__m128i __lsx_vmini_bu (__m128i, imm0_31);
__m128i __lsx_vmini_d (__m128i, imm_n16_15)
__m128i __lsx_vmini_d (__m128i, imm_n16_15);
__m128i __lsx_vmini_du (__m128i, imm0_31);
__m128i __lsx_vmini_h (__m128i, imm_n16_15)
__m128i __lsx_vmini_h (__m128i, imm_n16_15);
__m128i __lsx_vmini_hu (__m128i, imm0_31);
__m128i __lsx_vmini_w (__m128i, imm_n16_15)
__m128i __lsx_vmini_w (__m128i, imm_n16_15);
__m128i __lsx_vmini_wu (__m128i, imm0_31);
__m128i __lsx_vmin_w (__m128i, __m128i);
__m128i __lsx_vmin_wu (__m128i, __m128i);
Expand Down Expand Up @@ -585,7 +585,7 @@ __m128i __lsx_vsrari_w (__m128i, imm0_31);
__m128i __lsx_vsrarn_b_h (__m128i, __m128i);
__m128i __lsx_vsrarn_h_w (__m128i, __m128i);
__m128i __lsx_vsrarni_b_h (__m128i, __m128i, imm0_15);
__m128i __lsx_vsrarni_d_q (__m128i, __m128i, imm0_127)
__m128i __lsx_vsrarni_d_q (__m128i, __m128i, imm0_127);
__m128i __lsx_vsrarni_h_w (__m128i, __m128i, imm0_31);
__m128i __lsx_vsrarni_w_d (__m128i, __m128i, imm0_63);
__m128i __lsx_vsrarn_w_d (__m128i, __m128i);
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4 changes: 2 additions & 2 deletions main.py
Original file line number Diff line number Diff line change
Expand Up @@ -704,7 +704,7 @@ def vslti(name):
if signedness == "signed":
imm_range = "imm_n16_15"
else:
imm_range = "imm_0_31"
imm_range = "imm0_31"
return instruction(
intrinsic=f"__m128i __lsx_vslti_{name} (__m128i a, {imm_range} imm)",
instr=f"vslti.{name} vr, vr, imm",
Expand Down Expand Up @@ -1289,7 +1289,7 @@ def vftint_l_s(rounding, low_high):
def vftint_w_d(rounding):
rounding_mode = get_rounding_mode(rounding)
return instruction(
intrinsic=f"__m128i __lsx_vftint{rounding}_w_d (__m128 a, __m128 b)",
intrinsic=f"__m128i __lsx_vftint{rounding}_w_d (__m128d a, __m128d b)",
instr=f"vftint{rounding}.w.d vr, vr",
desc=f"Convert double-precision floating point elements in `a` and `b` to 32-bit integer, {rounding_mode}.",
)
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