Move some instructions to main.py

code/vld.h

@@ -0,0 +1 @@
+dst = memory_load(128, addr + offset);

code/vldx.h

@@ -0,0 +1 @@
+dst = memory_load(128, addr + offset);

code/vst.h

@@ -0,0 +1 @@
+memory_store(128, data, addr + offset);

code/vstx.h

@@ -0,0 +1 @@
+memory_store(128, data, addr + offset);

docs/lsx/memory.md

@@ -1,94 +1,13 @@
 # Memory Load & Store
 
-## __m128i __lsx_vld (void * addr, imm_n2048_2047 offset)
-
-### Synopsis
-
-```c++
-__m128i __lsx_vld (void * addr, imm_n2048_2047 offset)
-#include <lsxintrin.h>
-Instruction: vld vr, r, imm
-CPU Flags: LSX
-```
-
-### Description
-
-Read 128-bit data from memory address `addr + offset`, save the data into `dst`.
-
-### Operation
-
-```c++
-dst = memory_load(128, addr + offset);
-```
-
-## __m128i __lsx_vldx (void * addr, long int offset)
-
-### Synopsis
-
-```c++
-__m128i __lsx_vldx (void * addr, long int offset);
-#include <lsxintrin.h>
-Instruction: vldx vr, r, r
-CPU Flags: LSX
-```
-
-### Description
-
-Read 128-bit data from memory address `addr + offset`, save the data into `dst`.
-
-### Operation
-
-```c++
-dst = memory_load(128, addr + offset);
-```
+{{ vld() }}
+{{ vldx() }}
 
 {{ vldrepl('b') }}
 {{ vldrepl('h') }}
 {{ vldrepl('w') }}
 {{ vldrepl('d') }}
 
-## void __lsx_vst (__m128i data, void * addr, imm_n2048_2047 offset)
-
-### Synopsis
-
-```c++
-void __lsx_vst (__m128i data, void * addr, imm_n2048_2047 offset)
-#include <lsxintrin.h>
-Instruction: vst vr, r, imm
-CPU Flags: LSX
-```
-
-### Description
-
-Write 128-bit data in `data` to memory address `addr + offset`.
-
-### Operation
-
-```c++
-memory_store(128, data, addr + offset);
-```
-
-## void __lsx_vstx (__m128i data, void * addr, long int offset)
-
-### Synopsis
-
-```c++
-void __lsx_vstx (__m128i data, void * addr, long int offset)
-#include <lsxintrin.h>
-Instruction: vstx vr, r, r
-CPU Flags: LSX
-```
-
-### Description
-
-Write 128-bit data in `data` to memory address `addr + offset`.
-
-### Operation
-
-```c++
-memory_store(128, data, addr + offset);
-```
-
 {{ vstelm('b') }}
 {{ vstelm('h') }}
 {{ vstelm('w') }}

docs/lsx/permutation.md

@@ -1,22 +1,3 @@
 # Permutation
 
-## __m128i __lsx_vpermi_w (__m128i a, __m128i b, imm0_255 imm)
-
-### Synopsis
-
-```c++
-__m128i __lsx_vpermi_w (__m128i a, __m128i b, imm0_255 imm)
-#include <lsxintrin.h>
-Instruction: vpermi.w vr, vr, imm
-CPU Flags: LSX
-```
-
-### Description
-
-Permute words from `a` and `b` with indices recorded in `imm` and store into `dst`.
-
-### Operation
-
-```c++
-{% include 'vpermi_w.h' %}
-```
+{{ vpermi_w() }}

docs/lsx/shift.md

@@ -1,46 +1,7 @@
 # Shift
 
-## __m128i __lsx_vbsll_v (__m128i a, imm0_31 imm)
-
-### Synopsis
-
-```c++
-__m128i __lsx_vbsll_v (__m128i a, imm0_31 imm)
-#include <lsxintrin.h>
-Instruction: vbsll.v vr, vr, imm
-CPU Flags: LSX
-```
-
-### Description
-
-Compute 128-bit `a` shifted left by `imm * 8` bits.
-
-### Operation
-
-```c++
-{% include 'vbsll_v.h' %}
-```
-
-## __m128i __lsx_vbsrl_v (__m128i a, imm0_31 imm)
-
-### Synopsis
-
-```c++
-__m128i __lsx_vbsrl_v (__m128i a, imm0_31 imm)
-#include <lsxintrin.h>
-Instruction: vbsrl.v vr, vr, imm
-CPU Flags: LSX
-```
-
-### Description
-
-Compute 128-bit `a` shifted right by `imm * 8` bits.
-
-### Operation
-
-```c++
-{% include 'vbsrl_v.h' %}
-```
+{{ vbsll_srl('sll', 'left') }}
+{{ vbsll_srl('srl', 'right') }}
 
 {{ vsll('b') }}
 {{ vsll('h') }}

docs/lsx/shuffling.md

@@ -1,27 +1,6 @@
 # Shuffling
 
-## __m128i __lsx_vshuf_b (__m128i a, __m128i b, __m128i c)
-
-### Synopsis
-
-```c++
-__m128i __lsx_vshuf_b (__m128i a, __m128i b, __m128i c)
-#include <lsxintrin.h>
-Instruction: vshuf.b vr, vr, vr, vr
-CPU Flags: LSX
-```
-
-### Description
-
-Shuffle bytes from `a` and `b` with indices from `c`.
-
-Caveat: the indices are placed in `c`, while in other `vshuf` intrinsics they are placed in `a`.
-
-### Operation
-
-```c++
-{% include 'vshuf_b.h' %}
-```
+{{ vshuf_b() }}
 
 {{ vshuf_hwd('h') }}
 {{ vshuf_hwd('w') }}

main.py

@@ -534,6 +534,20 @@ def vmini(name):
     def vmaxi(name):
         return vminmaxi("max", name)
 
+    @env.macro
+    def vshuf_b():
+        name = 'b'
+        width = widths[name]
+        return instruction(
+            intrinsic=f"__m128i __lsx_vshuf_b (__m128i a, __m128i b, __m128i c)",
+            instr=f"vshuf.{name} vr, vr, vr, vr",
+            desc=f"""
+Shuffle bytes from `a` and `b` with indices from `c`.
+
+Caveat: the indices are placed in `c`, while in other `vshuf` intrinsics, they are placed in `a`.
+""",
+        )
+
     @env.macro
     def vshuf_hwd(name):
         width = widths[name]
@@ -1396,3 +1410,51 @@ def vfrstpi(name):
             instr=f"vfrstpi.{name} vr, vr, vr",
             desc=f"Find the first negative {width}-bit element in `b`, set the index of the element to the lane of `a` specified by `imm`.",
         )
+
+    @env.macro
+    def vbsll_srl(name, dir):
+        return instruction(
+            intrinsic=f"__m128i __lsx_vb{name}_v (__m128i a, imm0_31 imm)",
+            instr=f"vb{name}.v vr, vr, imm",
+            desc=f"Compute 128-bit `a` shifted {dir} by `imm * 8` bits.",
+        )
+
+    @env.macro
+    def vpermi_w():
+        return instruction(
+            intrinsic=f"__m128i __lsx_vpermi_w (__m128i a, __m128i b, imm0_255 imm)",
+            instr=f"vpermi.w vr, vr, imm",
+            desc=f"Permute words from `a` and `b` with indices recorded in `imm` and store into `dst`.",
+        )
+
+    @env.macro
+    def vld():
+        return instruction(
+            intrinsic=f"__m128i __lsx_vld (void * addr, imm_n2048_2047 offset)",
+            instr=f"vld vr, r, imm",
+            desc=f"Read 128-bit data from memory address `addr + offset`, save the data into `dst`.",
+        )
+
+    @env.macro
+    def vldx():
+        return instruction(
+            intrinsic=f"__m128i __lsx_vldx (void * addr, long int offset)",
+            instr=f"vldx vr, r, r",
+            desc=f"Read 128-bit data from memory address `addr + offset`, save the data into `dst`.",
+        )
+
+    @env.macro
+    def vst():
+        return instruction(
+            intrinsic=f"void __lsx_vst (__m128i data, void * addr, imm_n2048_2047 offset)",
+            instr=f"vst vr, r, imm",
+            desc=f"Write 128-bit data in `data` to memory address `addr + offset`.",
+        )
+
+    @env.macro
+    def vstx():
+        return instruction(
+            intrinsic=f"void __lsx_vstx (__m128i data, void * addr, long int offset)",
+            instr=f"vstx vr, r, r",
+            desc=f"Write 128-bit data in `data` to memory address `addr + offset`.",
+        )