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Add vftint.l.d/vftint.w.s
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jiegec committed Dec 13, 2023
1 parent 97ffcad commit d4b75ba
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Showing 14 changed files with 81 additions and 15 deletions.
8 changes: 0 additions & 8 deletions README.md
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Expand Up @@ -56,14 +56,6 @@ TODO List:

### vffinth.d.w

### vftint.w.s/l.d

### vftintrm.w.s/l.d

### vftintrz.w.s/l.d

### vftintrne.w.s/l.d

### vftint.wu.s/lu.d

### vftintrz.wu.s/lu.d
12 changes: 12 additions & 0 deletions code/gen_impl.py
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Expand Up @@ -797,6 +797,18 @@
file=f,
)
print(f"}}", file=f)
for rounding in ["", "rm", "rp", "rz", "rne"]:
if width == "s":
int_width = "w"
else:
int_width = "l"
with open(f"vftint{rounding}_{int_width}_{width}.h", "w") as f:
print(f"for (int i = 0;i < {128 // w};i++) {{", file=f)
print(
f" dst.{int_m}[i] = a.{m}[i]; // rounding mode is not expressed in C",
file=f,
)
print(f"}}", file=f)

for name in ["max", "min"]:
with open(f"vf{name}_{width}.h", "w") as f:
Expand Down
3 changes: 3 additions & 0 deletions code/vftint_l_d.h
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@@ -0,0 +1,3 @@
for (int i = 0; i < 2; i++) {
dst.dword[i] = a.fp64[i]; // rounding mode is not expressed in C
}
3 changes: 3 additions & 0 deletions code/vftint_w_s.h
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@@ -0,0 +1,3 @@
for (int i = 0; i < 4; i++) {
dst.word[i] = a.fp32[i]; // rounding mode is not expressed in C
}
3 changes: 3 additions & 0 deletions code/vftintrm_l_d.h
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@@ -0,0 +1,3 @@
for (int i = 0; i < 2; i++) {
dst.dword[i] = a.fp64[i]; // rounding mode is not expressed in C
}
3 changes: 3 additions & 0 deletions code/vftintrm_w_s.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,3 @@
for (int i = 0; i < 4; i++) {
dst.word[i] = a.fp32[i]; // rounding mode is not expressed in C
}
3 changes: 3 additions & 0 deletions code/vftintrne_l_d.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,3 @@
for (int i = 0; i < 2; i++) {
dst.dword[i] = a.fp64[i]; // rounding mode is not expressed in C
}
3 changes: 3 additions & 0 deletions code/vftintrne_w_s.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,3 @@
for (int i = 0; i < 4; i++) {
dst.word[i] = a.fp32[i]; // rounding mode is not expressed in C
}
3 changes: 3 additions & 0 deletions code/vftintrp_l_d.h
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@@ -0,0 +1,3 @@
for (int i = 0; i < 2; i++) {
dst.dword[i] = a.fp64[i]; // rounding mode is not expressed in C
}
3 changes: 3 additions & 0 deletions code/vftintrp_w_s.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,3 @@
for (int i = 0; i < 4; i++) {
dst.word[i] = a.fp32[i]; // rounding mode is not expressed in C
}
3 changes: 3 additions & 0 deletions code/vftintrz_l_d.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,3 @@
for (int i = 0; i < 2; i++) {
dst.dword[i] = a.fp64[i]; // rounding mode is not expressed in C
}
3 changes: 3 additions & 0 deletions code/vftintrz_w_s.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,3 @@
for (int i = 0; i < 4; i++) {
dst.word[i] = a.fp32[i]; // rounding mode is not expressed in C
}
11 changes: 11 additions & 0 deletions docs/lsx/float_conversion.md
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Expand Up @@ -74,3 +74,14 @@ Convert double precision floating point elements in `a` and `b` to double precis
{{ vftint_l_s('rz', 'h') }}
{{ vftint_l_s('rne', 'l') }}
{{ vftint_l_s('rne', 'h') }}

{{ vftint('', 'l', 'd') }}
{{ vftint('', 'w', 's') }}
{{ vftint('rm', 'l', 'd') }}
{{ vftint('rm', 'w', 's') }}
{{ vftint('rp', 'l', 'd') }}
{{ vftint('rp', 'w', 's') }}
{{ vftint('rz', 'l', 'd') }}
{{ vftint('rz', 'w', 's') }}
{{ vftint('rne', 'l', 'd') }}
{{ vftint('rne', 'w', 's') }}
35 changes: 28 additions & 7 deletions main.py
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Expand Up @@ -1257,12 +1257,7 @@ def vsat(name):
desc=f"Clamp {signedness} {width}-bit elements in `a` to range specified by `imm`.",
)

@env.macro
def vftint_l_s(rounding, low_high):
if low_high == "l":
half = "lower"
else:
half = "higher"
def get_rounding_mode(rounding):
if rounding == "":
rounding_mode = "using current rounding mode specified in `fscr`"
elif rounding == "rm":
Expand All @@ -1275,8 +1270,34 @@ def vftint_l_s(rounding, low_high):
rounding_mode = "rounding towards nearest even"
else:
assert False
return rounding_mode

@env.macro
def vftint_l_s(rounding, low_high):
if low_high == "l":
half = "lower"
else:
half = "higher"
rounding_mode = get_rounding_mode(rounding)
return instruction(
intrinsic=f"__m128i __lsx_vftint{rounding}{low_high}_l_s (__m128i a)",
intrinsic=f"__m128i __lsx_vftint{rounding}{low_high}_l_s (__m128 a)",
instr=f"vftint{rounding}{low_high}.l.s vr, vr",
desc=f"Convert single-precision floating point elements in {half} part of `a` to 64-bit integer, {rounding_mode}.",
)

@env.macro
def vftint(rounding, name, name2):
if name2 == "d":
arg_type = "__m128d"
precision = "double"
int_width = 64
else:
arg_type = "__m128"
precision = "single"
int_width = 32
rounding_mode = get_rounding_mode(rounding)
return instruction(
intrinsic=f"__m128i __lsx_vftint{rounding}_{name}_{name2} ({arg_type} a)",
instr=f"vftint{rounding}.{name}.{name2} vr, vr",
desc=f"Convert {precision}-precision floating point elements in `a` to {int_width}-bit integer, {rounding_mode}.",
)

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