Skip to content

Rename verilog-compiler.vhdl to verilog-compiler.yml #1

Rename verilog-compiler.vhdl to verilog-compiler.yml

Rename verilog-compiler.vhdl to verilog-compiler.yml #1

Workflow file for this run

on: [pull_request]
jobs:
clean-verilog:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v2 # Checkout source
- uses: reviewdog/action-setup@v1 # Setup reviewdog
- uses: SuibianP/verilog-cleaner@v1 # lint and format
with:
github_token: ${{ secrets.GITHUB_TOKEN }}
- uses: peter-evans/create-pull-request@v3 # Creates pull request with formatting results
with:
delete-branch: true