Merge branch 'release/1.0'

.gitignore

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+.pio
+.vscode

LICENSE

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+Copyright (c) 2021 James P. Howard, II <[email protected]>
+
+Permission is hereby granted, free of charge, to any person
+obtaining a copy of this software and associated documentation files
+(the "Software"), to deal in the Software without restriction,
+including without limitation the rights to use, copy, modify, merge,
+publish, distribute, sublicense, and/or sell copies of the Software,
+and to permit persons to whom the Software is furnished to do so,
+subject to the following conditions:
+
+The above copyright notice and this permission notice shall be
+included in all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+NONINFRINGEMENT.  IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.

README.md

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+# WS2818B SPI Controller for ATtiny85
+
+This code for a WS2818B SPI controller using the
+[ATtiny85](https://www.microchip.com/wwwproducts/en/ATtiny85).  It
+is loosely based on the [ATtiny10 Neopixel controller by Wayne
+Holder](https://sites.google.com/site/wayneholder/besting-ben-heck).
+
+The controller requires three pins on the ATtiny85.  The pin
+assignments can be changed in the defines, but the following shows
+the default layout.  PB5 (Pin 1) shold probably be connected to Vcc
+through a resistor in the 10k- to 30k-ohm range.
+
+## Expected Connection Diagram
+
+                +====+
+     Vcc -> PB5 |*   | Vcc
+      NC <- PB3 |    | PB2 <- CLK
+    LEDs -- PB4 |    | PB1 -- NC
+            GND |    | PB0 <- MOSI
+                +====+
+
+## Direct Dependencies
+
+* [PlatformIO](https://platformio.org/)
+
+PlatformIO is used to manage the build environment.
+
+## Contribution guidelines
+
+* Use [GitFlow](http://nvie.com/posts/a-successful-git-branching-model/)
+
+## For more information
+
+* James P. Howard, II <<[email protected]>>

avr-minipro.py

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+Import("env")
+
+upload_protocol = env.subst("$UPLOAD_PROTOCOL")
+
+def before_fuses(source, target, env):
+    print("before_fuses")
+    fuses_section = "fuses"
+
+    board = env.BoardConfig()
+    lfuse = board.get("%s.lfuse" % fuses_section, "")
+    hfuse = board.get("%s.hfuse" % fuses_section, "")
+    efuse = board.get("%s.efuse" % fuses_section, "")
+    lock = board.get("%s.lock_bits" % fuses_section, "0xff")
+
+    # write out the fuse data to a file minipro knows
+    fuses_file_name = env.get("BUILD_DIR") + "/" + env.get("PROGNAME") + ".fuses.conf"
+    env.Execute(f"echo fuses_lo = {lfuse} > {fuses_file_name}")
+    env.Execute(f"echo fuses_hi = {hfuse} >> {fuses_file_name}")
+    env.Execute(f"echo fuses_ext = {efuse} >> {fuses_file_name}")
+    env.Execute(f"echo lock_byte = {lock} >> {fuses_file_name}")
+
+if upload_protocol == "minipro":
+    env.AddPreAction("fuses", before_fuses)
+
+    env.Replace(
+        FUSESUPLOADER="minipro",
+        FUSESUPLOADERFLAGS = [
+            "-p",
+            "$BOARD_MCU",
+            "-c",
+            "config",
+            "-w",
+            "${BUILD_DIR}/${PROGNAME}.fuses.conf"
+        ],
+        SETFUSESCMD = "$FUSESUPLOADER $FUSESUPLOADERFLAGS",
+    )
+
+    env.Replace(
+        UPLOADER="minipro",
+        MINIPROFLAGS=[
+            "-p", 
+            "$BOARD",
+            "-f",
+            "ihex"
+        ],
+        UPLOADCMD="$UPLOADER $MINIPROFLAGS -w $SOURCES",
+    )
+    upload_actions = [env.VerboseAction("$UPLOADCMD", "Uploading $SOURCE")]

include/README

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+
+This directory is intended for project header files.
+
+A header file is a file containing C declarations and macro definitions
+to be shared between several project source files. You request the use of a
+header file in your project source file (C, C++, etc) located in `src` folder
+by including it, with the C preprocessing directive `#include'.
+
+```src/main.c
+
+#include "header.h"
+
+int main (void)
+{
+ ...
+}
+```
+
+Including a header file produces the same results as copying the header file
+into each source file that needs it. Such copying would be time-consuming
+and error-prone. With a header file, the related declarations appear
+in only one place. If they need to be changed, they can be changed in one
+place, and programs that include the header file will automatically use the
+new version when next recompiled. The header file eliminates the labor of
+finding and changing all the copies as well as the risk that a failure to
+find one copy will result in inconsistencies within a program.
+
+In C, the usual convention is to give header files names that end with `.h'.
+It is most portable to use only letters, digits, dashes, and underscores in
+header file names, and at most one dot.
+
+Read more about using header files in official GCC documentation:
+
+* Include Syntax
+* Include Operation
+* Once-Only Headers
+* Computed Includes
+
+https://gcc.gnu.org/onlinedocs/cpp/Header-Files.html

lib/README

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+
+This directory is intended for project specific (private) libraries.
+PlatformIO will compile them to static libraries and link into executable file.
+
+The source code of each library should be placed in a an own separate directory
+("lib/your_library_name/[here are source files]").
+
+For example, see a structure of the following two libraries `Foo` and `Bar`:
+
+|--lib
+|  |
+|  |--Bar
+|  |  |--docs
+|  |  |--examples
+|  |  |--src
+|  |     |- Bar.c
+|  |     |- Bar.h
+|  |  |- library.json (optional, custom build options, etc) https://docs.platformio.org/page/librarymanager/config.html
+|  |
+|  |--Foo
+|  |  |- Foo.c
+|  |  |- Foo.h
+|  |
+|  |- README --> THIS FILE
+|
+|- platformio.ini
+|--src
+   |- main.c
+
+and a contents of `src/main.c`:
+```
+#include <Foo.h>
+#include <Bar.h>
+
+int main (void)
+{
+  ...
+}
+
+```
+
+PlatformIO Library Dependency Finder will find automatically dependent
+libraries scanning project source files.
+
+More information about PlatformIO Library Dependency Finder
+- https://docs.platformio.org/page/librarymanager/ldf.html

platformio.ini

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+; PlatformIO Project Configuration File
+;
+;   Build options: build flags, source filter
+;   Upload options: custom upload port, speed and extra flags
+;   Library options: dependencies, extra library storages
+;   Advanced options: extra scripting
+;
+; Please visit documentation for the other options and examples
+; https://docs.platformio.org/page/projectconf.html
+
+[platformio]
+default_envs = minipro
+description = WS2818B SPI Controller for ATtiny85
+
+[env]
+platform = atmelavr
+board = attiny85
+board_build.f_cpu = 16000000L
+extra_scripts = 
+	pure-avrasm.py
+	avr-minipro.py
+board_fuses.lfuse = 0xE2
+board_fuses.hfuse = 0xDF
+board_fuses.efuse = 0xFF
+build_type = release
+
+[env:isp]
+upload_protocol = stk500v1
+upload_flags = 
+	-P$UPLOAD_PORT
+	-b$UPLOAD_SPEED
+upload_port = /dev/cu.usbmodem14301
+upload_speed = 19200
+
+[env:minipro]
+upload_protocol = minipro

pure-avrasm.py

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+Import("env")
+
+## Get rid of the C/C++ runtime
+env.Replace(LINKFLAGS = ["-nostartfiles", "-nostdlib", "-nodefaultlibs"])

src/main.S

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+;  Copyright (c) 2021 James P. Howard, II <[email protected]>
+;
+;  Permission is hereby granted, free of charge, to any person
+;  obtaining a copy of this software and associated documentation files
+;  (the "Software"), to deal in the Software without restriction,
+;  including without limitation the rights to use, copy, modify, merge,
+;  publish, distribute, sublicense, and/or sell copies of the Software,
+;  and to permit persons to whom the Software is furnished to do so,
+;  subject to the following conditions:
+;
+;  The above copyright notice and this permission notice shall be
+;  included in all copies or substantial portions of the Software.
+;
+;  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+;  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+;  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+;  NONINFRINGEMENT.  IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+;  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+;  ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+;  CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+;  SOFTWARE.
+
+;  WS2818b SPI controller using the ATtiny85.  This is loosely based on
+;  the ATtiny10 Neopixel controller by Wayne Holder and available at
+;  https://sites.google.com/site/wayneholder/besting-ben-heck
+;
+;  The controller requires three pins on the ATtiny85.  The pin
+;  assignments can be changed below, but the following shows the
+;  default layout.  PB5 (Pin 1) shold probably be connected to Vcc
+;  through a resistor in the 10k- to 30k-ohm range.
+;
+;               +====+
+;    Vcc -> PB5 |*   | Vcc
+;     NC <- PB3 |    | PB2 <- SCLK
+;   LEDs -- PB4 |    | PB1 -- NC
+;           GND |    | PB0 <- MOSI
+;               +====+
+
+#define __SFR_OFFSET 0
+
+#include <avr/io.h>
+
+;  Give the ports we intend to use functional names
+#define MOSI    DDB0
+#define SCLK    DDB2
+#define DOUT    DDB4
+
+.org        0x0000          ; Lay out the interrupt table
+    rjmp    RESET           ; Let's get this party started
+
+.org        0x0010          ; Real work starts here
+
+RESET:                      ; Reset the Attiny85
+    clr     r17             ; Set Clock Prescaler to 1:1 (CLKPR = 0)
+    out     CLKPR, r17
+
+    cbi     DDRB, MOSI      ; Set MOSI as input
+    cbi     DDRB, SCLK      ; Set SCLK as input
+    sbi     DDRB, DOUT      ; Set DOUT as output
+    cbi     PORTB, DOUT     ; Set DOUT LOW to clear the port
+
+    ldi     r17, 0x7F       ; Set OSCCAL to 8Mhz
+    out     OSCCAL, r17
+
+WAIT_SCLK_HI:               ; Wait for the next clock signal
+    sbis    PINB, SCLK      ; Wait for CLK to go HIGH (rising edge)
+    rjmp    WAIT_SCLK_HI
+    cli                     ; Disable interrupts for RT performance
+    sbis    PINB, MOSI      ; Skip if MOSI "1" bit
+    rjmp    SEND_0          ; Send 0 to DOUT
+
+SEND_1:                     ; Else send 1 to DOUT
+    sbi     PORTB, DOUT     ; Set DOUT HIGH to start sequence
+    lpm                     ; 750 ns at 8 MHz
+    lpm
+    cbi     PORTB, DOUT     ; Set DOUT LOW to end sequence
+    lpm                     ; 500 ns at 8 MHz
+    rjmp    CLOSEOUT
+
+SEND_0:                     ; Send 0 to DOUT
+    sbi     PORTB, DOUT     ; Set DOUT HIGH to start sequence
+    lpm                     ; 375 ns at 8 MHz
+    cbi     PORTB, DOUT     ; Set DOUT LOW to end sequence
+    lpm                     ; 875 ns at 8 MHz
+    lpm
+    nop
+
+CLOSEOUT:                   ; Cleanup and go back to the start
+    sei                     ; Re-enable interrupts
+
+WAIT_SCLK_LO: 
+    sbic    PINB, SCLK      ; Wait for CLK to go LOW (falling edge)
+    rjmp    WAIT_SCLK_LO
+    rjmp    WAIT_SCLK_HI    ; Start again on next bit

test/README

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+
+This directory is intended for PlatformIO Unit Testing and project tests.
+
+Unit Testing is a software testing method by which individual units of
+source code, sets of one or more MCU program modules together with associated
+control data, usage procedures, and operating procedures, are tested to
+determine whether they are fit for use. Unit testing finds problems early
+in the development cycle.
+
+More information about PlatformIO Unit Testing:
+- https://docs.platformio.org/page/plus/unit-testing.html