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Define ACC_BITS in configs
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minseongg committed Nov 20, 2024
1 parent 45c861c commit be940a3
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Showing 2 changed files with 2 additions and 3 deletions.
2 changes: 2 additions & 0 deletions hazardflow-designs/src/gemmini/configs.rs
Original file line number Diff line number Diff line change
Expand Up @@ -86,5 +86,7 @@ pub const CL_RS_MAX_PER_TYPE: usize = clog2(RS_MAX_PER_TYPE);

/// Bit width of inputType.
pub const INPUT_BITS: usize = 8;
/// Bit width of the PE register type.
pub const ACC_BITS: usize = 32;
/// Bit width of outputType.
pub const OUTPUT_BITS: usize = 20;
3 changes: 0 additions & 3 deletions hazardflow-designs/src/gemmini/execute/systolic_array/pe.rs
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Expand Up @@ -4,9 +4,6 @@

use super::*;

/// Bit width of the register type.
pub const ACC_BITS: usize = 32;

/// PE row data signals.
#[derive(Debug, Clone, Copy)]
pub struct PeRowData {
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