v0.4.3

New in version 0.4.3 since 0.4.2

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• Changes *

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• Added the option to not render the buses, when generating the dot graph. This
  allows for a much cleaner graph.
• Inferred true dual port memory are now more portable. The old definition
  produced inconsistent behaviour, depending on which VHDL simulator was being
  used.
• Moved function definitions in VHDL into the process definition. This allows
  the functions to access variables and buses, which are local to the process.

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• Fixes *

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• Fixed error when initializing multidimensional arrays.
• Fixed triggering of unclocked processes. Before, clocked processes wouldn't
  properly set the signal triggering unclocked processes.
• Fixed Windows line endings not being stripped in csv_util.vhdl.
• Fixed wrong name generation, when the first instance of a process came from
  a different namespace. E.g. when the first process was a
  SME.Components.TrueDualPortRAM, all names would start with SME_Components
  instead of the proper namespace of the process.