GitHub - kkiningh/synthesis-example: Example of a full DC synthesis script for a simple design

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Example of a full DC synthesis script for a simple design

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Name		Name	Last commit message	Last commit date
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scripts		scripts
.gitignore		.gitignore
README.md		README.md
dc.sh		dc.sh
top.sv		top.sv

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Synthesis example

To run:

./dc.sh -f scripts/dc/dc.sh

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Example of a full DC synthesis script for a simple design

verilog synthesis synopsys vlsi designcompiler

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