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Merge pull request #1 from jamesdiacono/master
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Minimal UP5K chip support
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dalnefre authored Oct 8, 2023
2 parents 9df00c8 + b30b9b1 commit 4d6a11f
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4 changes: 2 additions & 2 deletions README
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This project aims to develop a tool to graphically view a
place-n-routed ICE40 configuration, showing the exact placement of
every signal and logic gates. It reads the *.asc files that are also
used as input to icepack to generate the final bitstream. Both HX1K
and HX8K devices are supported.
used as input to icepack to generate the final bitstream. HX1K, HX8K, and UP5K
devices are supported.

This is still work in progress, and some connections are not shown,
eg. global nets and BRAM connections. Still, it should already be quite
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