RISC-V-Assembly-Introductory-Exercises

collection of exercises designed to introduce students to the fundamental concepts of computer architecture using the RISC-V instruction set.

This repository is an unofficial supplement for students at the Technical University of Munich (TUM) enrolled in the Introduction to Computer Architecture course. However, it's also a valuable resource for anyone interested in learning RISC-V assembly language.

Environment

This collection of exercises is designed to be used with the QtRvSim environment, a user-friendly simulator tailored for RISC-V assembly language. QtRvSim provides an interactive and visual approach to learning assembly code, making it an ideal platform for beginners.

Objective

The primary aim of this repository is to provide hands-on, practical exercises to enhance understanding of RISC-V assembly programming. These exercises are tailored to assist beginners in grasping the basic principles of assembly language in a structured and progressive manner.

Exercises

Exercise name	Difficulty	Covered topics
binary2dec	easy	load/store, bit operations
counting_bits	easy	bit operations
max_of_arr	easy	load/store
reversing_string	easy	load/store, strings
simple_stack	easy	stack
sum_even	easy	load/store, bit operations
bubblesort	medium	load/store
dec2binary	medium	load/store, bit operations
jumptables	medium	jumptables
printlen	medium	load/store, strings
rec_fn	medium	recursion
binary_search	hard	load/store, complex control flow, recursion
binary_tree_max	hard	load/store, trees, complex control flow, recursion
triangular_numbers	hard	recursion

Contribution

While this is an unofficial resource for TUM students, contributions are welcome. Whether it's fixing bugs, adding new exercises, or improving documentation, your input is valuable.