Merge branch 'master' into libretro

libretro · Nov 17, 2024 · 9ee9a7b · 9ee9a7b
2 parents 2dd736d + 22346d4
commit 9ee9a7b
Show file tree

Hide file tree

Showing 5 changed files with 21 additions and 13 deletions.
diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c
@@ -526,6 +526,7 @@ static int ari64_thread_check_range(unsigned int start, unsigned int end) { retu
 
 static int ari64_init()
 {
+	static u32 scratch_buf[8*8*2] __attribute__((aligned(64)));
 	size_t i;
 
 	new_dynarec_init();
@@ -553,6 +554,7 @@ static int ari64_init()
 #endif
 	psxH_ptr = psxH;
 	zeromem_ptr = zero_mem;
+	scratch_buf_ptr = scratch_buf; // for gte_neon.S
 
 	ari64_thread_init();
 

diff --git a/libpcsxcore/new_dynarec/linkage_arm.S b/libpcsxcore/new_dynarec/linkage_arm.S
@@ -34,6 +34,11 @@
 #define gteCheckStallRaw	ESYM(gteCheckStallRaw)
 #define psxException		ESYM(psxException)
 #define execI			ESYM(execI)
+#endif
+
+/* make mini_ht reachable with a single armv4 insn */
+#if (LO_mini_ht & ~0xff0)
+#error misligned mini_ht
 #endif
 
 	.bss
@@ -79,8 +84,9 @@ DRC_VAR(mem_wtab, 4)
 DRC_VAR(psxH_ptr, 4)
 DRC_VAR(zeromem_ptr, 4)
 DRC_VAR(invc_ptr, 4)
-DRC_VAR(hash_table_ptr, 4)
+DRC_VAR(scratch_buf_ptr, 4)
 DRC_VAR(ram_offset, 4)
+DRC_VAR(hash_table_ptr, 4)
 DRC_VAR(mini_ht, 256)
 
 

diff --git a/libpcsxcore/new_dynarec/linkage_arm64.S b/libpcsxcore/new_dynarec/linkage_arm64.S
@@ -81,8 +81,9 @@ DRC_VAR(mem_wtab, 8)
 DRC_VAR(psxH_ptr, 8)
 DRC_VAR(invc_ptr, 8)
 DRC_VAR(zeromem_ptr, 8)
-DRC_VAR(hash_table_ptr, 8)
+DRC_VAR(scratch_buf_ptr, 8)
 DRC_VAR(ram_offset, 8)
+DRC_VAR(hash_table_ptr, 8)
 DRC_VAR(mini_ht, 256)
 
 

diff --git a/libpcsxcore/new_dynarec/linkage_offsets.h b/libpcsxcore/new_dynarec/linkage_offsets.h
@@ -1,11 +1,7 @@
 
 #define PTRSZ __SIZEOF_POINTER__
 
-#define LO_unused0		64
-#define LO_unused1		(LO_unused0 + 4)
-#define LO_unused2		(LO_unused1 + 4)
-#define LO_unused3		(LO_unused2 + 4)
-#define LO_cycle_count		(LO_unused3 + 4)
+#define LO_cycle_count		64
 #define LO_last_count		(LO_cycle_count + 4)
 #define LO_address		(LO_last_count + 4)
 #define LO_hack_addr		(LO_address + 4)
@@ -22,13 +18,13 @@
 #define LO_interrupt		(LO_cycle + 4)
 #define LO_intCycle		(LO_interrupt + 4)
 #define LO_next_interupt	(LO_intCycle + 4*2*31)
-#define LO_unused4		(LO_next_interupt + 4)
-#define LO_gteBusyCycle		(LO_unused4 + 4)
+#define LO_unused		(LO_next_interupt + 4)
+#define LO_gteBusyCycle		(LO_unused + 4)
 #define LO_muldivBusyCycle	(LO_gteBusyCycle + 4)
 #define LO_psxRegs_subCycle	(LO_muldivBusyCycle + 4)
 #define LO_psxRegs_biuReg	(LO_psxRegs_subCycle + 4*2)
 #define LO_stop            	(LO_psxRegs_biuReg + 4)
-#define LO_psxRegs_end		(LO_stop + 4*7)
+#define LO_psxRegs_end		(LO_stop + 4*9)
 #define LO_rcnts		(LO_psxRegs_end)
 #define LO_rcnts_end		(LO_rcnts + 7*4*4)
 #define LO_inv_code_start	(LO_rcnts_end)
@@ -38,10 +34,12 @@
 #define LO_psxH_ptr		(LO_mem_wtab + PTRSZ)
 #define LO_zeromem_ptr		(LO_psxH_ptr + PTRSZ)
 #define LO_invc_ptr		(LO_zeromem_ptr + PTRSZ)
-#define LO_hash_table_ptr	(LO_invc_ptr + PTRSZ)
-#define LO_saved_lr		(LO_hash_table_ptr + PTRSZ)
+#define LO_scratch_buf_ptr	(LO_invc_ptr + PTRSZ)        // for gte_neon.S
+#define LO_saved_lr		(LO_scratch_buf_ptr + PTRSZ)
 #define LO_ram_offset		(LO_saved_lr + PTRSZ)
-#define LO_mini_ht		(LO_ram_offset + PTRSZ)
+#define LO_hash_table_ptr	(LO_ram_offset + PTRSZ)
+#define LO_unused2		(LO_hash_table_ptr + PTRSZ)
+#define LO_mini_ht		(LO_unused2 + PTRSZ)
 #define LO_dynarec_local_size	(LO_mini_ht + PTRSZ*32*2)
 
 #define LO_cop2_to_scratch_buf	(LO_scratch_buf_ptr - LO_reg_cop2d)
diff --git a/libpcsxcore/r3000a.h b/libpcsxcore/r3000a.h
@@ -214,6 +214,7 @@ typedef struct psxRegisters {
 	u32 biosBranchCheck;
 	u32 cpuInRecursion;
 	u32 gpuIdleAfter;
+	u32 unused3[2];
 	// warning: changing anything in psxRegisters requires update of all
 	// asm in libpcsxcore/new_dynarec/ and may break savestates
 } psxRegisters;