git subrepo pull --force --remote=https://git.savannah.gnu.org/git/li…

…ghtning.git --branch=master --update deps/lightning

subrepo:
  subdir:   "deps/lightning"
  merged:   "808fdde9e8"
upstream:
  origin:   "https://git.savannah.gnu.org/git/lightning.git"
  branch:   "master"
  commit:   "808fdde9e8"
git-subrepo:
  version:  "0.4.6"
  origin:   "https://github.com/ingydotnet/git-subrepo.git"
  commit:   "110b9eb"

deps/lightning/.gitmodules

@@ -0,0 +1,3 @@
+[submodule "gnulib"]
+	path = gnulib
+	url = git://git.sv.gnu.org/gnulib.git

deps/lightning/.gitrepo

@@ -4,9 +4,9 @@
 ; git-subrepo command. See https://github.com/git-commands/git-subrepo#readme
 ;
 [subrepo]
-	remote = https://github.com/pcercuei/gnu_lightning.git
-	branch = pcsx_rearmed
-	commit = de026794c71386983034461bce2df3c63ccd5827
-	parent = fb67ea334b0f3984a114a6e306806a56347a83ba
+	remote = https://git.savannah.gnu.org/git/lightning.git
+	branch = master
+	commit = 808fdde9e81cc1f43fd3ef3b01d24744c18bc123
+	parent = dde06e44db790da43b379ff3ef74accb15c3586e
 	method = merge
 	cmdver = 0.4.6

deps/lightning/ChangeLog

@@ -1,3 +1,40 @@
+2024-01-24 Paulo Andrade <[email protected]>
+
+	* check/Makefile.am: Add new ldstxbar test.
+	* check/all.tst: Add simple code to disassemble new codes.
+	* check/lightning.c: Add logic to call the new codes.
+	* doc/body.texi: Document the new codes and remove note about
+	only an immediate displacement argument supported.
+	* include/lightning.h.in: Add the new {ld,st}x{b,a}r_* codes.
+	* lib/jit_names.c: Add debug string for the new codes.
+	* lib/lightning.c: Implement fallbacks for the new codes.
+	* lib/jit_aarch64-sz.c, lib/jit_aarch64.c, lib/jit_alpha.c,
+	lib/jit_arm-sz.c, lib/jit_arm.c, lib/jit_hppa.c, lib/jit_ia64.c,
+	lib/jit_loongarch-sz.c, lib/jit_loongarch.c, lib/jit_mips-sz.c,
+	lib/jit_mips.c, lib/jit_ppc-sz.c, lib/jit_ppc.c, lib/jit_riscv-sz.c,
+	lib/jit_riscv.c, lib/jit_s390.c, lib/jit_sparc-sz.c, lib/jit_sparc.c,
+	lib/jit_x86-sz.c, lib/jit_x86.c: Implement the new increment load
+	and store codes with a register displacement.
+
+2023-12-22 Paulo Andrade <[email protected]>
+
+	* check/Makefile.am: Add new ldstxbai test.
+	* check/all.tst: Add simple code to disassemble new codes.
+	* check/lightning.c: Add logic to call the new codes.
+	* doc/body.texi: Document the new codes.
+	* include/lightning.h.in: Add the new {ld,st}x{b,a}i_* codes.
+	* include/lightning/jit_private.h: Add jit_cc_a1_dep to tell
+	the instruction has argument one used as input and output.
+	* lib/lightning.c: Implement fallbacks for the new codes.
+	* lib/jit_names.c: Add debug string for the new codes.
+	* lib/jit_aarch64-sz.c, lib/jit_aarch64.c, lib/jit_alpha.c,
+	lib/jit_arm-sz.c, lib/jit_arm.c, lib/jit_hppa.c, lib/jit_ia64.c,
+	lib/jit_loongarch-sz.c, lib/jit_loongarch.c, lib/jit_mips-sz.c,
+	lib/jit_mips.c, lib/jit_ppc-sz.c, lib/jit_ppc.c, lib/jit_riscv-sz.c,
+	lib/jit_riscv.c, lib/jit_s390.c, lib/jit_sparc-sz.c, lib/jit_sparc.c,
+	lib/jit_x86-sz.c, lib/jit_x86.c: Implement the new increment load
+	and store codes.
+
 2023-08-21 Paulo Andrade <[email protected]>
 
 	* check/Makefile.am, check/lightning.c: Add new hmul tests.

deps/lightning/TODO

@@ -1 +1,2 @@
-
+o Use PC relative load/store in aarch64
+o Check post-index in real arm hardware

deps/lightning/check/Makefile.am

@@ -18,7 +18,7 @@ AM_CFLAGS = -I$(top_builddir)/include -I$(top_srcdir)/include \
 	-D_GNU_SOURCE $(LIGHTNING_CFLAGS)
 
 check_PROGRAMS = lightning ccall self setcode nodata ctramp carg cva_list \
-	catomic protect riprel cbit callee
+	catomic protect riprel cbit callee cldstxba
 
 lightning_LDADD = $(top_builddir)/lib/liblightning.la -lm $(SHLIB)
 lightning_SOURCES = lightning.c
@@ -67,7 +67,11 @@ cbit_SOURCES = cbit.c
 callee_LDADD = $(top_builddir)/lib/liblightning.la -lm $(SHLIB)
 callee_SOURCES = callee.c
 
+cldstxba_LDADD = $(top_builddir)/lib/liblightning.la -lm $(SHLIB)
+cldstxba_SOURCES = cldstxba.c
+
 noinst_PROGRAMS = gen_cbit
+gen_cgit_LDADD =
 gen_cbit_SOURCES = gen_cbit.c
 
 cbit.c:		gen_cbit
@@ -94,6 +98,8 @@ EXTRA_DIST =				\
 	ldstr-c.tst	ldstr-c.ok	\
 	ldstxr-c.tst	ldstxr-c.ok	\
 	ldstxi-c.tst	ldstxi-c.ok	\
+	ldstxbai.tst	ldstxbai.ok	\
+	ldstxbar.tst	ldstxbar.ok	\
 	ext.tst		ext.ok		\
 	cvt.tst		cvt.ok		\
 	hton.tst	hton.ok		\
@@ -162,8 +168,9 @@ base_TESTS =				\
 	ldstr ldsti			\
 	ldstxr ldstxi			\
 	ldstr-c ldstxr-c ldstxi-c	\
-	ext cvt hton bswap branch	\
-	alu_add alux_add		\
+	ldstxbai ldstxbar		\
+	ext cvt hton bswap		\
+	branch alu_add alux_add		\
 	alu_sub alux_sub alu_rsb	\
 	alu_mul alu_hmul		\
 	alu_div alu_rem			\
@@ -193,6 +200,7 @@ x87_TESTS =					\
 	rpn.x87 ldstr.x87 ldsti.x87		\
 	ldstxr.x87 ldstxi.x87			\
 	ldstr-c.x87 ldstxr-c.x87 ldstxi-c.x87	\
+	ldstxbai.x87 ldstxbar.x87		\
 	ext.x87 cvt.x87 branch.x87		\
 	alu_add.x87 alux_add.x87		\
 	alu_sub.x87 alux_sub.x87 alu_rsb.x87	\
@@ -245,6 +253,7 @@ arm_TESTS =					\
 	rpn.arm ldstr.arm ldsti.arm		\
 	ldstxr.arm ldstxi.arm			\
 	ldstr-c.arm ldstxr-c.arm ldstxi-c.arm	\
+	ldstxbai.arm ldstxbar.arm		\
 	ext.arm cvt.arm hton.arm bswap.arm	\
 	branch.arm alu_add.arm alux_add.arm	\
 	alu_sub.arm alux_sub.arm alu_rsb.arm	\
@@ -273,6 +282,7 @@ swf_TESTS =					\
 	rpn.swf ldstr.swf ldsti.swf		\
 	ldstxr.swf ldstxi.swf			\
 	ldstr-c.swf ldstxr-c.swf ldstxi-c.swf	\
+	ldstxbai.swf ldstxbar.swf		\
 	ext.swf cvt.swf hton.swf bswap.swf	\
 	branch.swf alu_add.swf alux_add.swf	\
 	alu_sub.swf alux_sub.swf alu_rsb.swf	\
@@ -299,6 +309,7 @@ arm_swf_TESTS =							\
 	rpn.arm.swf ldstr.arm.swf ldsti.arm.swf			\
 	ldstxr.arm.swf ldstxi.arm.swf				\
 	ldstr-c.arm.swf ldstxr-c.arm.swf ldstxi-c.arm.swf	\
+	ldstxbai.arm.swf ldstxbar.arm.swf			\
 	ext.arm.swf cvt.arm.swf hton.arm.swf bswap.arm.swf	\
 	branch.arm.swf alu_add.arm.swf alux_add.arm.swf		\
 	alu_sub.arm.swf alux_sub.arm.swf alu_rsb.arm.swf	\
@@ -325,6 +336,7 @@ arm4_swf_TESTS =						\
 	rpn.arm4.swf ldstr.arm4.swf ldsti.arm4.swf		\
 	ldstxr.arm4.swf ldstxi.arm4.swf				\
 	ldstr-c.arm4.swf ldstxr-c.arm4.swf ldstxi-c.arm4.swf	\
+	ldstxbai.arm4.swf ldstxbar.arm4.swf			\
 	ext.arm4.swf cvt.arm4.swf hton.arm4.swf bswap.arm4.swf	\
 	branch.arm4.swf	alu_add.arm4.swf alux_add.arm4.swf	\
 	alu_sub.arm4.swf alux_sub.arm4.swf alu_rsb.arm4.swf	\
@@ -354,6 +366,7 @@ nodata_TESTS =						\
 	rpn.nodata ldstr.nodata ldsti.nodata		\
 	ldstxr.nodata ldstxi.nodata			\
 	ldstr-c.nodata ldstxr-c.nodata ldstxi-c.nodata	\
+	ldstxbai.nodata ldstxbar.nodata			\
 	ext.nodata cvt.nodata branch.nodata		\
 	alu_add.nodata alux_add.nodata			\
 	alu_sub.nodata alux_sub.nodata alu_rsb.nodata	\

deps/lightning/check/all.tst

@@ -198,6 +198,43 @@
 	ldxr_l %r0 %r1 %r2
 	ldxi_l %r0 %r1 8
 #endif
+	ldxbr_c %r0 %r1 %r2
+	ldxbi_c %r0 %r1 1
+	ldxar_c %r0 %r1 %r2
+	ldxai_c %r0 %r1 1
+	ldxbr_uc %r0 %r1 %r2
+	ldxbi_uc %r0 %r1 1
+	ldxar_uc %r0 %r1 %r2
+	ldxai_uc %r0 %r1 1
+	ldxbr_s %r0 %r1 %r2
+	ldxbi_s %r0 %r1 2
+	ldxar_s %r0 %r1 %r2
+	ldxai_s %r0 %r1 2
+	ldxbr_us %r0 %r1 %r2
+	ldxbi_us %r0 %r1 2
+	ldxar_us %r0 %r1 %r2
+	ldxai_us %r0 %r1 2
+	ldxbr_i %r0 %r1 %r2
+	ldxbi_i %r0 %r1 4
+	ldxar_i %r0 %r1 %r2
+	ldxai_i %r0 %r1 4
+#if __WORDSIZE == 64
+	ldxbr_ui %r0 %r1 %r2
+	ldxbi_ui %r0 %r1 4
+	ldxar_ui %r0 %r1 %r2
+	ldxai_ui %r0 %r1 4
+	ldxbi_l %r0 %r1 8
+	ldxbr_l %r0 %r1 %r2
+	ldxai_l %r0 %r1 8
+#endif
+	ldxbr_f %f0 %r1 %r2
+	ldxbi_f %f0 %r1 4
+	ldxar_f %f0 %r1 %r2
+	ldxai_f %f0 %r1 4
+	ldxbr_d %f0 %r1 %r2
+	ldxbi_d %f0 %r1 8
+	ldxar_d %f0 %r1 %r2
+	ldxai_d %f0 %r1 8
 	str_c %r1 %r0
 	sti_c 0x80000000 %r1
 	str_s %r1 %r0
@@ -218,6 +255,32 @@
 	stxr_l %r2 %r1 %r0
 	stxi_l 8 %r1 %r0
 #endif
+	stxbr_c %r2 %r1 %r0
+	stxbi_c 1 %r1 %r0
+	stxar_c %r2 %r1 %r0
+	stxai_c 1 %r1 %r0
+	stxbr_s %r2 %r1 %r0
+	stxbi_s 2 %r1 %r0
+	stxar_s %r2 %r1 %r0
+	stxai_s 2 %r1 %r0
+	stxbr_i %r2 %r1 %r0
+	stxbi_i 4 %r1 %r0
+	stxar_i %r2 %r1 %r0
+	stxai_i 4 %r1 %r0
+#if __WORDSIZE == 64
+	stxbr_l %r2 %r1 %r0
+	stxbi_l 8 %r1 %r0
+	stxar_l %r2 %r1 %r0
+	stxai_l 8 %r1 %r0
+#endif
+	stxbr_f %r2 %r0 %f0
+	stxbi_f 4 %r0 %f0
+	stxar_f %r2 %r0 %f0
+	stxai_f 4 %r0 %f0
+	stxbr_d %r2 %r0 %f0
+	stxbi_d 8 %r0 %f0
+	stxar_d %r2 %r0 %f0
+	stxai_d 8 %r0 %f0
 cond:
 	bltr cond %r0 %r1
 condi:

deps/lightning/check/carry.tst

@@ -136,6 +136,8 @@ ok:
 	fadd(__LINE__,   , r0, r1, x7fe, x1, x7f)
 	tsub(__LINE__,   , r0, r1, x80,  x1, x7f)
 	fsub(__LINE__,   , r0, r1, x7f,  x1, x7fe)
+	fsub(__LINE__,   , r0, r1, x0,   x1, ff)
+	fsub(__LINE__,   , r0, r1, ff,   ff, x0)
 	tadd(__LINE__, _u, r0, r1, ff,   x1, x0)
 	fadd(__LINE__, _u, r0, r1, x7f,  x1, x80)
 	tsub(__LINE__, _u, r0, r1, x0,   x1, ff)