pwm: atmel-hlcdc: Fix frequency output being half of expected #6
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The atmel-hlcdc PWM driver generates an output frequency that is exactly half of the value requested in the device tree. For example, a request for 1000 Hz results in a 500 Hz output. This is caused by an incorrect prescaler calculation. The driver's formula for the clock divider did not match the hardware, which uses a division factor of 2^(pres + 1). The driver was missing the "+1", causing the output period to be doubled. This patch corrects the calculation to `2^(pres + 1)`, aligning it with the hardware's behavior and ensuring the generated frequency is correct.
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The atmel-hlcdc PWM driver generates an output frequency that is
exactly half of the value requested in the device tree. For example,
a request for 1000 Hz results in a 500 Hz output.
This is caused by an incorrect prescaler calculation. The driver's
formula for the clock divider did not match the hardware, which uses
a division factor of 2^(pres + 1). The driver was missing the "+1",
causing the output period to be doubled.
This patch corrects the calculation to
2^(pres + 1), aligning itwith the hardware's behavior and ensuring the generated frequency is
correct.