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terasic_de2_115: Cosmetic cleanup.
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@enjoy-digital
enjoy-digital committed Nov 6, 2023
1 parent d8228c2 commit c7ad9ad
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Showing 2 changed files with 59 additions and 61 deletions.
40 changes: 20 additions & 20 deletions litex_boards/platforms/terasic_de2_115.py
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Original file line number Diff line number Diff line change
Expand Up @@ -16,16 +16,16 @@
("clk25", 0, Pins("A14"), IOStandard("3.3-V LVTTL")),

# Red LEDs
("user_led", 0, Pins("G19"), IOStandard("2.5 V")),
("user_led", 1, Pins("F19"), IOStandard("2.5 V")),
("user_led", 2, Pins("E19"), IOStandard("2.5 V")),
("user_led", 3, Pins("F21"), IOStandard("2.5 V")),
("user_led", 4, Pins("F18"), IOStandard("2.5 V")),
("user_led", 5, Pins("E18"), IOStandard("2.5 V")),
("user_led", 6, Pins("J19"), IOStandard("2.5 V")),
("user_led", 7, Pins("H19"), IOStandard("2.5 V")),
("user_led", 8, Pins("J17"), IOStandard("2.5 V")),
("user_led", 9, Pins("G17"), IOStandard("2.5 V")),
("user_led", 0, Pins("G19"), IOStandard("2.5 V")),
("user_led", 1, Pins("F19"), IOStandard("2.5 V")),
("user_led", 2, Pins("E19"), IOStandard("2.5 V")),
("user_led", 3, Pins("F21"), IOStandard("2.5 V")),
("user_led", 4, Pins("F18"), IOStandard("2.5 V")),
("user_led", 5, Pins("E18"), IOStandard("2.5 V")),
("user_led", 6, Pins("J19"), IOStandard("2.5 V")),
("user_led", 7, Pins("H19"), IOStandard("2.5 V")),
("user_led", 8, Pins("J17"), IOStandard("2.5 V")),
("user_led", 9, Pins("G17"), IOStandard("2.5 V")),
("user_led", 10, Pins("J15"), IOStandard("2.5 V")),
("user_led", 11, Pins("H16"), IOStandard("2.5 V")),
("user_led", 12, Pins("J16"), IOStandard("2.5 V")),
Expand Down Expand Up @@ -76,18 +76,18 @@
IOStandard("2.5 V")
),
("eth", 0,
Subsignal("rst_n", Pins("C19")),
Subsignal("int_n", Pins("A21")),
Subsignal("mdio", Pins("B21")),
Subsignal("mdc", Pins("C20")),
Subsignal("rx_dv", Pins("C17")),
Subsignal("rx_er", Pins("D18")),
Subsignal("rst_n", Pins("C19")),
Subsignal("int_n", Pins("A21")),
Subsignal("mdio", Pins("B21")),
Subsignal("mdc", Pins("C20")),
Subsignal("rx_dv", Pins("C17")),
Subsignal("rx_er", Pins("D18")),
Subsignal("rx_data", Pins("C16 D16 D17 C15")),
Subsignal("tx_en", Pins("A18")),
Subsignal("tx_er", Pins("B18")),
Subsignal("tx_en", Pins("A18")),
Subsignal("tx_er", Pins("B18")),
Subsignal("tx_data", Pins("C18 D19 A19 B19")),
Subsignal("col", Pins("E15")),
Subsignal("crs", Pins("D15")),
Subsignal("col", Pins("E15")),
Subsignal("crs", Pins("D15")),
IOStandard("2.5 V")
),

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80 changes: 39 additions & 41 deletions litex_boards/targets/terasic_de2_115.py
View file
Original file line number Diff line number Diff line change
Expand Up @@ -51,16 +51,14 @@ def __init__(self, platform, sys_clk_freq):
# BaseSoC ------------------------------------------------------------------------------------------

class BaseSoC(SoCCore):
def __init__(
self,
sys_clk_freq=50e6,
with_ethernet=False,
with_etherbone=False,
with_sdcard=False,
with_led_chaser=True,
ethernet_phy=0,
etherbone_ip="192.168.1.50",
etherbone_phy=1,
def __init__(self, sys_clk_freq=50e6,
with_ethernet = False,
with_etherbone = False,
with_sdcard = False,
with_led_chaser = True,
ethernet_phy = 0,
etherbone_ip = "192.168.1.50",
etherbone_phy = 1,
**kwargs,
):
platform = terasic_de2_115.Platform()
Expand All @@ -83,16 +81,16 @@ def __init__(
# Add debug interface if the CPU has one ---------------------------------------------------
if hasattr(self.cpu, "debug_bus"):
self.register_mem(
name="vexriscv_debug",
address=0xF00F0000,
interface=self.cpu.debug_bus,
size=0x100,
name = "vexriscv_debug",
address = 0xF00F0000,
interface = self.cpu.debug_bus,
size = 0x100,
)

# Leds -------------------------------------------------------------------------------------
if with_led_chaser:
self.leds = LedChaser(
pads=platform.request_all("user_led"), sys_clk_freq=sys_clk_freq
pads = platform.request_all("user_led"), sys_clk_freq=sys_clk_freq
)
self.leds.add_pwm()

Expand All @@ -104,24 +102,24 @@ def __init__(
if with_ethernet:
# Ethernet PHY
self.submodules.ethphy = LiteEthPHYMII(
clock_pads=platform.request("eth_clocks", ethernet_phy),
pads=platform.request("eth", ethernet_phy),
clock_pads = platform.request("eth_clocks", ethernet_phy),
pads = platform.request("eth", ethernet_phy),
)
self.add_ethernet(
phy=self.ethphy,
phy_cd="ethphy_eth" if with_etherbone else "eth",
dynamic_ip=True,
phy = self.ethphy,
phy_cd = "ethphy_eth" if with_etherbone else "eth",
dynamic_ip = True,
)
if with_etherbone:
# Ethernet PHY
self.submodules.ethbphy = LiteEthPHYMII(
clock_pads=platform.request("eth_clocks", etherbone_phy),
pads=platform.request("eth", etherbone_phy),
clock_pads = platform.request("eth_clocks", etherbone_phy),
pads = platform.request("eth", etherbone_phy),
)
self.add_etherbone(
phy=self.ethbphy,
phy_cd="ethbphy_eth" if with_ethernet else "eth",
ip_address=etherbone_ip,
phy = self.ethbphy,
phy_cd = "ethbphy_eth" if with_ethernet else "eth",
ip_address = etherbone_ip,
)

# Build --------------------------------------------------------------------------------------------
Expand All @@ -130,25 +128,25 @@ def main():
from litex.build.parser import LiteXArgumentParser
parser = LiteXArgumentParser(platform=terasic_de2_115.Platform, description="LiteX SoC on DE2-115.")

parser.add_target_argument("--sys-clk-freq", default=50e6, type=float, help="System clock frequency.")
parser.add_target_argument("--with-led-chaser", action="store_true", help="Enable LED chaser.")
parser.add_target_argument("--with-sdcard", action="store_true", help="Enable SD card support.")
parser.add_target_argument("--with-ethernet", action="store_true", help="Enable Ethernet support.")
parser.add_target_argument("--with-etherbone", action="store_true", help="Enable Etherbone support.")
parser.add_target_argument("--etherbone-ip", default="192.168.48.100", help="Etherbone IP address.")
parser.add_target_argument("--etherbone-phy", default=1, type=int, help="Etherbone PHY (0 or 1).")
parser.add_target_argument("--ethernet-phy", default=0, type=int, help="Ethernet PHY (0 or 1).")
parser.add_target_argument("--sys-clk-freq", default=50e6, type=float, help="System clock frequency.")
parser.add_target_argument("--with-led-chaser", action="store_true", help="Enable LED chaser.")
parser.add_target_argument("--with-sdcard", action="store_true", help="Enable SD card support.")
parser.add_target_argument("--with-ethernet", action="store_true", help="Enable Ethernet support.")
parser.add_target_argument("--with-etherbone", action="store_true", help="Enable Etherbone support.")
parser.add_target_argument("--etherbone-ip", default="192.168.48.100", help="Etherbone IP address.")
parser.add_target_argument("--etherbone-phy", default=1, type=int, help="Etherbone PHY (0 or 1).")
parser.add_target_argument("--ethernet-phy", default=0, type=int, help="Ethernet PHY (0 or 1).")
args = parser.parse_args()

soc = BaseSoC(
sys_clk_freq=args.sys_clk_freq,
with_sdcard=args.with_sdcard,
with_ethernet=args.with_ethernet,
with_etherbone=args.with_etherbone,
with_led_chaser=args.with_led_chaser,
etherbone_ip=args.etherbone_ip,
etherbone_phy=args.etherbone_phy,
ethernet_phy=args.ethernet_phy,
sys_clk_freq = args.sys_clk_freq,
with_sdcard = args.with_sdcard,
with_ethernet = args.with_ethernet,
with_etherbone = args.with_etherbone,
with_led_chaser = args.with_led_chaser,
etherbone_ip = args.etherbone_ip,
etherbone_phy = args.etherbone_phy,
ethernet_phy = args.ethernet_phy,
**parser.soc_argdict,
)

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