[GlobalISel] Catching inconsistencies in load memory, result, and range metadata type

[parsifal-47]

This is a fix for:
#97290
Please let me know if that is the right way to address the issue. Thank you!

[llvmbot]

@llvm/pr-subscribers-backend-amdgpu

@llvm/pr-subscribers-llvm-globalisel

Author: Renat Idrisov (parsifal-47)

Changes

This is a fix for:
#97290
Please let me know if that is the right way to address the issue. Thank you!

---

Full diff: https://github.com/llvm/llvm-project/pull/121247.diff

2 Files Affected:

• (modified) llvm/lib/CodeGen/MachineVerifier.cpp (+6)
• (added) llvm/test/CodeGen/AMDGPU/GlobalISel/test_g_load_vector_to_scalar.mir (+25)

diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index bec36b728ae328..1866d3ae2b285a 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -1274,6 +1274,12 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) {
         if (TypeSize::isKnownGT(MMO.getSize().getValue(),
                                 ValTy.getSizeInBytes()))
           report("load memory size cannot exceed result size", MI);
+
+        if (MMO.getRanges() && (ValTy.isVector() != MMO.getType().isVector())) {
+          report("scalar operands cannot be loaded into vector values and vice "
+                 "versa",
+                 MI);
+        }
       } else if (MI->getOpcode() == TargetOpcode::G_STORE) {
         if (TypeSize::isKnownLT(ValTy.getSizeInBytes(),
                                 MMO.getSize().getValue()))
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/test_g_load_vector_to_scalar.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/test_g_load_vector_to_scalar.mir
new file mode 100644
index 00000000000000..95429127c30d0c
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/test_g_load_vector_to_scalar.mir
@@ -0,0 +1,25 @@
+# RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=amdgpu-prelegalizer-combiner -verify-machineinstrs %s -o -
+--- |
+  define void @range_metadata_sext_i33_signed_range_i64_load_as_v2i32() {
+    ret void
+  }
+
+  !1 = !{i64 -8589934591, i64 8589934592}
+
+...
+---
+name:            range_metadata_sext_i33_signed_range_i64_load_as_v2i32
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $vgpr0, $vgpr1
+
+    %1:_(s32) = COPY $vgpr0
+    %2:_(s32) = COPY $vgpr1
+    %0:_(p1) = G_MERGE_VALUES %1(s32), %2(s32)
+    ; CHECK: Bad machine code: scalar operands cannot be loaded into vector values
+    %3:_(<2 x s32>) = G_LOAD %0(p1) :: (volatile load (s64), align 4, !range !1, addrspace 1)
+    $vgpr0_vgpr1 = COPY %3
+    SI_RETURN implicit $vgpr0_vgpr1
+
+...

[parsifal-47]

@arsenm please take a look when you have a chance, thank you!

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