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[InstCombine] Add missing patterns for scmp and ucmp #149225

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AZero13 Jul 16, 2025
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[InstCombine] Add missing patterns for scmp and ucmp
AZero13 Jul 16, 2025
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58 changes: 58 additions & 0 deletions llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3635,6 +3635,10 @@ static Instruction *foldBitCeil(SelectInst &SI, IRBuilderBase &Builder,
// (x < y) ? -1 : zext(x > y)
// (x > y) ? 1 : sext(x != y)
// (x > y) ? 1 : sext(x < y)
// (x == y) ? 0 : (x > y ? 1 : -1)
// (x == y) ? 0 : (x < y ? -1 : 1)
// Special case: x == C ? 0 : (x > C - 1 ? 1 : -1)
// Special case: x == C ? 0 : (x < C + 1 ? -1 : 1)
// Into ucmp/scmp(x, y), where signedness is determined by the signedness
// of the comparison in the original sequence.
Instruction *InstCombinerImpl::foldSelectToCmp(SelectInst &SI) {
Expand Down Expand Up @@ -3727,6 +3731,45 @@ Instruction *InstCombinerImpl::foldSelectToCmp(SelectInst &SI) {
}
}

// Special cases with constants: x == C ? 0 : (x > C-1 ? 1 : -1)
if (Pred == ICmpInst::ICMP_EQ && match(TV, m_Zero())) {
Value *X;
const APInt *C;
if (match(LHS, m_Value(X)) && match(RHS, m_APInt(C))) {
CmpPredicate InnerPred;
Value *InnerLHS, *InnerRHS;
const APInt *InnerTV, *InnerFV;
if (match(FV, m_Select(
m_ICmp(InnerPred, m_Value(InnerLHS), m_Value(InnerRHS)),
m_APInt(InnerTV), m_APInt(InnerFV)))) {

// x == C ? 0 : (x > C-1 ? 1 : -1)
if (ICmpInst::isGT(InnerPred) && InnerTV->isOne() &&
InnerFV->isAllOnes()) {
IsSigned = ICmpInst::isSigned(InnerPred);
bool CanSubOne = IsSigned ? !C->isMinSignedValue() : !C->isMinValue();
if (CanSubOne) {
APInt Cminus1 = *C - 1;
if (InnerLHS == X && match(InnerRHS, m_SpecificInt(Cminus1)))
Replace = true;
}
}

// x == C ? 0 : (x < C+1 ? -1 : 1)
if (ICmpInst::isLT(InnerPred) && InnerTV->isAllOnes() &&
InnerFV->isOne()) {
IsSigned = ICmpInst::isSigned(InnerPred);
bool CanAddOne = IsSigned ? !C->isMaxSignedValue() : !C->isMaxValue();
if (CanAddOne) {
APInt Cplus1 = *C + 1;
if (InnerLHS == X && match(InnerRHS, m_SpecificInt(Cplus1)))
Replace = true;
}
}
}
}
}

Intrinsic::ID IID = IsSigned ? Intrinsic::scmp : Intrinsic::ucmp;
if (Replace)
return replaceInstUsesWith(
Expand Down Expand Up @@ -4496,5 +4539,20 @@ Instruction *InstCombinerImpl::visitSelectInst(SelectInst &SI) {
return replaceOperand(SI, 2, ConstantInt::get(FalseVal->getType(), 0));
}

// Canonicalize sign function ashr pattern: select (icmp slt X, 1), ashr X,
// bitwidth-1, 1 -> scmp(X, 0)
Value *X;
unsigned BitWidth = SI.getType()->getScalarSizeInBits();
CmpPredicate Pred;
if (match(&SI, m_Select(m_ICmp(Pred, m_Value(X), m_One()),
m_AShr(m_Deferred(X), m_SpecificInt(BitWidth - 1)),
m_One())) &&
Pred == ICmpInst::ICMP_SLT) {

Function *Scmp = Intrinsic::getOrInsertDeclaration(
SI.getModule(), Intrinsic::scmp, {SI.getType(), SI.getType()});
return CallInst::Create(Scmp, {X, ConstantInt::get(SI.getType(), 0)});
}

return nullptr;
}
191 changes: 191 additions & 0 deletions llvm/test/Transforms/InstCombine/scmp.ll
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Expand Up @@ -436,6 +436,197 @@ define <3 x i2> @scmp_unary_shuffle_ops(<3 x i8> %x, <3 x i8> %y) {
ret <3 x i2> %r
}

define i32 @scmp_ashr(i32 %a) {
; CHECK-LABEL: define i32 @scmp_ashr(
; CHECK-SAME: i32 [[A:%.*]]) {
; CHECK-NEXT: [[RETVAL_0:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 0)
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%a.lobit = ashr i32 %a, 31
%cmp.inv = icmp slt i32 %a, 1
%retval.0 = select i1 %cmp.inv, i32 %a.lobit, i32 1
ret i32 %retval.0
}

define i32 @scmp_sgt_slt(i32 %a) {
; CHECK-LABEL: define i32 @scmp_sgt_slt(
; CHECK-SAME: i32 [[A:%.*]]) {
; CHECK-NEXT: [[RETVAL_0:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 0)
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%cmp = icmp sgt i32 %a, 0
%cmp1 = icmp slt i32 %a, 0
%. = select i1 %cmp1, i32 -1, i32 0
%retval.0 = select i1 %cmp, i32 1, i32 %.
ret i32 %retval.0
}

define i32 @scmp_zero_slt(i32 %a) {
; CHECK-LABEL: define i32 @scmp_zero_slt(
; CHECK-SAME: i32 [[A:%.*]]) {
; CHECK-NEXT: [[RETVAL_0:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 0)
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%cmp = icmp eq i32 %a, 0
%cmp1.inv = icmp slt i32 %a, 1
%. = select i1 %cmp1.inv, i32 -1, i32 1
%retval.0 = select i1 %cmp, i32 0, i32 %.
ret i32 %retval.0
}

define i32 @scmp_zero_sgt(i32 %a) {
; CHECK-LABEL: define i32 @scmp_zero_sgt(
; CHECK-SAME: i32 [[A:%.*]]) {
; CHECK-NEXT: [[RETVAL_0:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 0)
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%cmp = icmp eq i32 %a, 0
%cmp1.inv = icmp sgt i32 %a, -1
%. = select i1 %cmp1.inv, i32 1, i32 -1
%retval.0 = select i1 %cmp, i32 0, i32 %.
ret i32 %retval.0
}


define i32 @scmp_zero_sgt_1(i32 %a) {
; CHECK-LABEL: define i32 @scmp_zero_sgt_1(
; CHECK-SAME: i32 [[A:%.*]]) {
; CHECK-NEXT: [[COND2:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 0)
; CHECK-NEXT: ret i32 [[COND2]]
;
%cmp = icmp eq i32 %a, 0
%cmp1 = icmp sgt i32 %a, -1
%cond = select i1 %cmp1, i32 1, i32 -1
%cond2 = select i1 %cmp, i32 0, i32 %cond
ret i32 %cond2
}

define i32 @scmp_zero_slt_1(i32 %a) {
; CHECK-LABEL: define i32 @scmp_zero_slt_1(
; CHECK-SAME: i32 [[A:%.*]]) {
; CHECK-NEXT: [[COND2:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 0)
; CHECK-NEXT: ret i32 [[COND2]]
;
%cmp = icmp eq i32 %a, 0
%cmp1 = icmp slt i32 %a, 1
%cond = select i1 %cmp1, i32 -1, i32 1
%cond2 = select i1 %cmp, i32 0, i32 %cond
ret i32 %cond2
}

define i32 @scmp_zero_slt_neg(i32 %a) {
; CHECK-LABEL: define i32 @scmp_zero_slt_neg(
; CHECK-SAME: i32 [[A:%.*]]) {
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A]], -1
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP1]], i32 -1, i32 1
; CHECK-NEXT: [[COND2:%.*]] = select i1 [[CMP]], i32 0, i32 [[COND]]
; CHECK-NEXT: ret i32 [[COND2]]
;
%cmp = icmp eq i32 %a, 0
%cmp1 = icmp slt i32 %a, -1
%cond = select i1 %cmp1, i32 -1, i32 1
%cond2 = select i1 %cmp, i32 0, i32 %cond
ret i32 %cond2
}

define i32 @scmp_zero_sgt_neg(i32 %a) {
; CHECK-LABEL: define i32 @scmp_zero_sgt_neg(
; CHECK-SAME: i32 [[A:%.*]]) {
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0
; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[A]], 1
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP1]], i32 1, i32 -1
; CHECK-NEXT: [[COND2:%.*]] = select i1 [[CMP]], i32 0, i32 [[COND]]
; CHECK-NEXT: ret i32 [[COND2]]
;
%cmp = icmp eq i32 %a, 0
%cmp1 = icmp sgt i32 %a, 1
%cond = select i1 %cmp1, i32 1, i32 -1
%cond2 = select i1 %cmp, i32 0, i32 %cond
ret i32 %cond2
}

define i32 @ucmp_ugt_ult_neg(i32 %a) {
; CHECK-LABEL: define i32 @ucmp_ugt_ult_neg(
; CHECK-SAME: i32 [[A:%.*]]) {
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp ne i32 [[A]], 0
; CHECK-NEXT: [[RETVAL_0:%.*]] = zext i1 [[CMP_NOT]] to i32
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%cmp = icmp ugt i32 %a, 0
%cmp1 = icmp ult i32 %a, 0
%. = select i1 %cmp1, i32 -1, i32 0
%retval.0 = select i1 %cmp, i32 1, i32 %.
ret i32 %retval.0
}

define i32 @ucmp_zero_ult_neg(i32 %a) {
; CHECK-LABEL: define i32 @ucmp_zero_ult_neg(
; CHECK-SAME: i32 [[A:%.*]]) {
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[A]], 0
; CHECK-NEXT: [[RETVAL_0:%.*]] = zext i1 [[CMP]] to i32
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%cmp = icmp eq i32 %a, 0
%cmp1.inv = icmp ult i32 %a, 1
%. = select i1 %cmp1.inv, i32 -1, i32 1
%retval.0 = select i1 %cmp, i32 0, i32 %.
ret i32 %retval.0
}

define i32 @ucmp_zero_ugt_neg(i32 %a) {
; CHECK-LABEL: define i32 @ucmp_zero_ugt_neg(
; CHECK-SAME: i32 [[A:%.*]]) {
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[A]], 0
; CHECK-NEXT: [[RETVAL_0:%.*]] = sext i1 [[CMP]] to i32
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%cmp = icmp eq i32 %a, 0
%cmp1.inv = icmp ugt i32 %a, -1
%. = select i1 %cmp1.inv, i32 1, i32 -1
%retval.0 = select i1 %cmp, i32 0, i32 %.
ret i32 %retval.0
}

define i32 @scmp_sgt_slt_ab(i32 %a, i32 %b) {
; CHECK-LABEL: define i32 @scmp_sgt_slt_ab(
; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
; CHECK-NEXT: [[RETVAL_0:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 [[B]])
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%cmp = icmp sgt i32 %a, %b
%cmp1 = icmp slt i32 %a, %b
%. = select i1 %cmp1, i32 -1, i32 0
%retval.0 = select i1 %cmp, i32 1, i32 %.
ret i32 %retval.0
}

define i32 @scmp_zero_slt_ab(i32 %a, i32 %b) {
; CHECK-LABEL: define i32 @scmp_zero_slt_ab(
; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
; CHECK-NEXT: [[RETVAL_0:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 [[B]])
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%cmp = icmp eq i32 %a, %b
%cmp1.inv = icmp slt i32 %a, %b
%. = select i1 %cmp1.inv, i32 -1, i32 1
%retval.0 = select i1 %cmp, i32 0, i32 %.
ret i32 %retval.0
}

define i32 @scmp_zero_sgt_ab(i32 %a, i32 %b) {
; CHECK-LABEL: define i32 @scmp_zero_sgt_ab(
; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
; CHECK-NEXT: [[RETVAL_0:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 [[B]])
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%cmp = icmp eq i32 %a, %b
%cmp1.inv = icmp sgt i32 %a, %b
%. = select i1 %cmp1.inv, i32 1, i32 -1
%retval.0 = select i1 %cmp, i32 0, i32 %.
ret i32 %retval.0
}

; Negative test: true value of outer select is not zero
define i8 @scmp_from_select_eq_and_gt_neg1(i32 %x, i32 %y) {
; CHECK-LABEL: define i8 @scmp_from_select_eq_and_gt_neg1(
Expand Down
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