Fixes in xxxxx for IEEE_DIVIDE_BY_ZERO FPE; separate cpu/gpu namespaces and fix runtest segfault

[valassi]

This is WIP MR with comprehensive fixes in xxxxxx funxtions for FPE floating point exceptions

It is motivated by and is meant to fix bug #701

[valassi]

This is finally complete - as good as it gets - and passes the CI tests. I am self merging.

I will then document it a posteriori.

[valassi]

This is some documentation for this MR #723.

This is addressing two rather large/complex issues. It is fixing 8 github issues in total.

1. Part 1 is floating point exceptions FPEs (branch fpe)

• It was meant to address all four FPEs in Four floating point exceptions in CPP launch of pp_ttW (IEEE_DIVIDE_BY_ZERO FPE in vxxxxx function in SIMD mode) #701 for nobm_pp_ttW. However, in the end it only fixed one of the four, the IEEE_DIVIDE_BY_ZERO in SIMD code (essentially, using a fake denominator instead of 0 in SIMD vectors, and using the volatile keyword to outsmart the optimizer). There are three other FPEs pending, to be followed up in Three floating point exceptions in CPP launch of nobm_pp_ttW (FPE in COUP values in VVV1P0_1) #733 and in WIP MR fix FPEs and debug nobm_pp_ttW for ATLAS #706. I have closed Four floating point exceptions in CPP launch of pp_ttW (IEEE_DIVIDE_BY_ZERO FPE in vxxxxx function in SIMD mode) #701 as IEEE_DIVIDE_BY_ZERO is fixed.
• The FPEs appear when C++ is linked to Fortran. To reproduce FPEs in C++ code only, I have added feenableExcept in testxxx, and I have maded other enhancements in the tests.
• One early attempt to fix IEEE_DIVIDE_BY_ZERO in SIMD code was disabling auto-vectorization for the ixx/oxx/vxx functions. However this resulted in poor performance for these functions. I have fixed this using the volatile keyword instead (after another attempt which was failing on clang, see below). This closes Disabling auto vectorization in ixx/oxx causes a loss of performance #727: now the performance is ok.
• Most of the debugging for IEEE_DIVIDE_BY_ZERO in SIMD code was done using gcc. My early attempt to disable auto vectorization was compiler dependent, so I made a note of testing clang too. It turns out that my second attempt, to recover performance, using fake denominators>0, was ok on gcc but failing on clang. This I fixed using volatile. This closes Ensure clang and icc builds are also ok with the new ixx/oxx/vxx #724: all tests pass on gcc, clang and icx, with good performance.
• En passant while working on clang and icx, I fixed a minor build warning that was pending since a long time. This closes icpx: warning: overriding '-ffp-contract=fast' option with '-ffp-contract=on' [-Woverriding-t-option] #516.
• The feenableExcept that I used to debug FPEs on linux is missing on MacOS, causing build errors. I have therefore removed feenableExcept from MacOS (FPEs are not tested in c++ code on MacOS). This closes feeenableexcept is missing on MacOS #730.

2. Part 2 is about separating cpu/gpu namespaces and fixing debug builds (branch namespace, initially in MR WIP: separate cpu/gpu namespaces and fix runtest segmentation fault #728 which I then coalesced with this one)

• The issue is that, to debug FPE issues, I started using debug builds. (Actually these were not always ideal, as some subtle issues only came from -O3 optimized builds anyway...).
• At some point I realised that the debug build of runTest was crashing. I understood that this was because runTest was mixing functions that were defined in different ways for CPU and GPU, or with different global settings. The solution (in line with Clarify build strategy for heterogeneous applications (and clean all build options) #318 about heterogeneous applications) was to improve the separation of the two namespaces for CPU and GPU entities. This fixes the runTest crash and closes Segfault in testxxx runTest.exe for debug builds (need separate cpu/gpu namespaces) #725.
• En passant, I identified and fixed a minor issue in the way compiler flags are passed to CUDA for debug builds (-Xcompiler was missing). This closes wrong compiler flags to nvcc for icx in debug mode #729.
• Separating CPU and GPU namespaces eventually implied that Parameters.cc must be built twice, once for the CPU and once for the GPU. This means that I had to reintroduce CUDA builds in src (these had disappeared, we were only having SubProcesses builds for CUDA). I implemented this using export NVCC (which is related to makefile cleanup in Cleanup of Makefiles #362 and Clean up interaction of Subprocess and src Makefile (export, override etc) #414... it is probably a good idea to use export much more). In doing this, however, I introduced a bug as I forgot to also export CUFLAGS. This was then fixed, closing CUDA builds of Parameters.cc get the wrong build flags (eg they fail the HRDCOD=1 build) #731.

I think this should be more or less all for this MR.

Next steps on this line of work would be

• merge the new master into Jorgen's HIP branch, as it will be affected quite significantly
• continue the investigation of FPEs in Three floating point exceptions in CPP launch of nobm_pp_ttW (FPE in COUP values in VVV1P0_1) #733 (the ATLAS process nobm_pp_ttW is unusable)

cc @roiser @oliviermattelaer @hageboeck @zeniheisser @Jooorgen