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Preserve integer index type for pointerref/pointerset. #342

Merged
merged 1 commit into from
May 10, 2023
Merged

Preserve integer index type for pointerref/pointerset. #342

merged 1 commit into from
May 10, 2023

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maleadt
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@maleadt maleadt commented May 9, 2023

For JuliaGPU/CUDA.jl#1895

Interestingly, we do still get an i64. With a simple CUDA vadd kernel, the unoptimized LLVM IR is:

; PTX CompilerJob of MethodInstance for vadd(::CuDeviceMatrix{Float32, 1, Int32}, ::CuDeviceMatrix{Float32, 1, Int32}, ::CuDeviceMatrix{Float32, 1, Int32}) for sm_86
define ptx_kernel void @_Z4vadd13CuDeviceArrayI7Float32Li2ELi1E5Int32ES_IS0_Li2ELi1ES1_ES_IS0_Li2ELi1ES1_E({ i8 addrspace(1)*, i32, [2 x i32], i32 } %0, { i8 addrspace(1)*, i32, [2 x i32], i32 } %1, { i8 addrspace(1)*, i32, [2 x i32], i32 } %2) local_unnamed_addr #1 {
conversion:
  %3 = alloca { i8 addrspace(1)*, i32, [2 x i32], i32 }, align 8
  store { i8 addrspace(1)*, i32, [2 x i32], i32 } %0, { i8 addrspace(1)*, i32, [2 x i32], i32 }* %3, align 8
  %4 = alloca { i8 addrspace(1)*, i32, [2 x i32], i32 }, align 8
  store { i8 addrspace(1)*, i32, [2 x i32], i32 } %1, { i8 addrspace(1)*, i32, [2 x i32], i32 }* %4, align 8
  %5 = alloca { i8 addrspace(1)*, i32, [2 x i32], i32 }, align 8
  store { i8 addrspace(1)*, i32, [2 x i32], i32 } %2, { i8 addrspace(1)*, i32, [2 x i32], i32 }* %5, align 8
  br label %top

top:                                              ; preds = %conversion
  %6 = alloca [1 x i32], align 4
  %7 = alloca [1 x i32], align 4
  %8 = alloca [1 x i32], align 4
  %9 = call {}*** @julia.get_pgcstack()
  %10 = bitcast {}*** %9 to {}**
  %current_task = getelementptr inbounds {}*, {}** %10, i64 -12
  %11 = bitcast {}** %current_task to i64*
  %world_age = getelementptr inbounds i64, i64* %11, i64 13
  %12 = call i32 @llvm.nvvm.read.ptx.sreg.ctaid.x()
  %13 = add i32 %12, 1
  %14 = call i32 @llvm.nvvm.read.ptx.sreg.ctaid.y()
  %15 = call i32 @llvm.nvvm.read.ptx.sreg.ctaid.z()
  %16 = sub i32 %13, 1
  %17 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
  %18 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.y()
  %19 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.z()
  %20 = mul i32 %16, %17
  %21 = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
  %22 = add i32 %21, 1
  %23 = call i32 @llvm.nvvm.read.ptx.sreg.tid.y()
  %24 = call i32 @llvm.nvvm.read.ptx.sreg.tid.z()
  %25 = add i32 %20, %22
  br label %L48

L48:                                              ; preds = %top
  %26 = getelementptr inbounds { i8 addrspace(1)*, i32, [2 x i32], i32 }, { i8 addrspace(1)*, i32, [2 x i32], i32 }* %3, i32 0, i32 0
  %27 = sub i32 %25, 1
  %28 = load i8 addrspace(1)*, i8 addrspace(1)** %26, align 8
  %29 = bitcast i8 addrspace(1)* %28 to float addrspace(1)*
  %30 = getelementptr inbounds float, float addrspace(1)* %29, i32 %27
  %31 = load float, float addrspace(1)* %30, align 4
  br label %L54

L54:                                              ; preds = %L48
  br label %L55

L55:                                              ; preds = %L54
  br label %L70

L70:                                              ; preds = %L55
  %32 = getelementptr inbounds { i8 addrspace(1)*, i32, [2 x i32], i32 }, { i8 addrspace(1)*, i32, [2 x i32], i32 }* %4, i32 0, i32 0
  %33 = sub i32 %25, 1
  %34 = load i8 addrspace(1)*, i8 addrspace(1)** %32, align 8
  %35 = bitcast i8 addrspace(1)* %34 to float addrspace(1)*
  %36 = getelementptr inbounds float, float addrspace(1)* %35, i32 %33
  %37 = load float, float addrspace(1)* %36, align 4
  br label %L76

L76:                                              ; preds = %L70
  br label %L77

L77:                                              ; preds = %L76
  %38 = fadd float %31, %37
  br label %L93

L93:                                              ; preds = %L77
  %39 = getelementptr inbounds { i8 addrspace(1)*, i32, [2 x i32], i32 }, { i8 addrspace(1)*, i32, [2 x i32], i32 }* %5, i32 0, i32 0
  %40 = sub i32 %25, 1
  %41 = load i8 addrspace(1)*, i8 addrspace(1)** %39, align 8
  %42 = bitcast i8 addrspace(1)* %41 to float addrspace(1)*
  %43 = getelementptr inbounds float, float addrspace(1)* %42, i32 %40
  store float %38, float addrspace(1)* %43, align 4
  br label %L99

L99:                                              ; preds = %L93
  br label %L100

L100:                                             ; preds = %L99
  ret void
}

i.e. no i64. However, after optimization:

; PTX CompilerJob of MethodInstance for vadd(::CuDeviceMatrix{Float32, 1, Int32}, ::CuDeviceMatrix{Float32, 1, Int32}, ::CuDeviceMatrix{Float32, 1, Int32}) for sm_86
define ptx_kernel void @_Z4vadd13CuDeviceArrayI7Float32Li2ELi1E5Int32ES_IS0_Li2ELi1ES1_ES_IS0_Li2ELi1ES1_E([1 x i64] %state, { i8 addrspace(1)*, i32, [2 x i32], i32 } %0, { i8 addrspace(1)*, i32, [2 x i32], i32 } %1, { i8 addrspace(1)*, i32, [2 x i32], i32 } %2) local_unnamed_addr #1 {
conversion:
  %.fca.0.extract11 = extractvalue { i8 addrspace(1)*, i32, [2 x i32], i32 } %0, 0
  %.fca.0.extract1 = extractvalue { i8 addrspace(1)*, i32, [2 x i32], i32 } %1, 0
  %.fca.0.extract = extractvalue { i8 addrspace(1)*, i32, [2 x i32], i32 } %2, 0
  %3 = call i32 @llvm.nvvm.read.ptx.sreg.ctaid.x()
  %4 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
  %5 = mul i32 %4, %3
  %6 = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
  %7 = add i32 %5, %6
  %8 = bitcast i8 addrspace(1)* %.fca.0.extract11 to float addrspace(1)*
  %9 = sext i32 %7 to i64
  %10 = getelementptr inbounds float, float addrspace(1)* %8, i64 %9
  %11 = load float, float addrspace(1)* %10, align 4
  %12 = bitcast i8 addrspace(1)* %.fca.0.extract1 to float addrspace(1)*
  %13 = getelementptr inbounds float, float addrspace(1)* %12, i64 %9
  %14 = load float, float addrspace(1)* %13, align 4
  %15 = fadd float %11, %14
  %16 = bitcast i8 addrspace(1)* %.fca.0.extract to float addrspace(1)*
  %17 = getelementptr inbounds float, float addrspace(1)* %16, i64 %9
  store float %15, float addrspace(1)* %17, align 4
  ret void
}

So optimization sneaks in an i64 GEP? Which is too bad, as it means the compiled PTX code still contains some 64-bit instructions.

@maleadt
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maleadt commented May 9, 2023 •
edited
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*** IR Dump After Promote heap allocation to stack (AllocOpt) ***
define ptx_kernel void @kernel({ i8 addrspace(1)*, i32, [2 x i32], i32 } %0, { i8 addrspace(1)*, i32, [2 x i32], i32 } %1, { i8 addrspace(1)*, i32, [2 x i32], i32 } %2) local_unnamed_addr #1 !dbg !8 {
conversion:
  %.fca.0.extract11 = extractvalue { i8 addrspace(1)*, i32, [2 x i32], i32 } %0, 0
  %.fca.1.extract12 = extractvalue { i8 addrspace(1)*, i32, [2 x i32], i32 } %0, 1
  %.fca.2.0.extract13 = extractvalue { i8 addrspace(1)*, i32, [2 x i32], i32 } %0, 2, 0
  %.fca.2.1.extract14 = extractvalue { i8 addrspace(1)*, i32, [2 x i32], i32 } %0, 2, 1
  %.fca.3.extract15 = extractvalue { i8 addrspace(1)*, i32, [2 x i32], i32 } %0, 3
  %.fca.0.extract1 = extractvalue { i8 addrspace(1)*, i32, [2 x i32], i32 } %1, 0
  %.fca.1.extract2 = extractvalue { i8 addrspace(1)*, i32, [2 x i32], i32 } %1, 1
  %.fca.2.0.extract3 = extractvalue { i8 addrspace(1)*, i32, [2 x i32], i32 } %1, 2, 0
  %.fca.2.1.extract4 = extractvalue { i8 addrspace(1)*, i32, [2 x i32], i32 } %1, 2, 1
  %.fca.3.extract5 = extractvalue { i8 addrspace(1)*, i32, [2 x i32], i32 } %1, 3
  %.fca.0.extract = extractvalue { i8 addrspace(1)*, i32, [2 x i32], i32 } %2, 0
  %.fca.1.extract = extractvalue { i8 addrspace(1)*, i32, [2 x i32], i32 } %2, 1
  %.fca.2.0.extract = extractvalue { i8 addrspace(1)*, i32, [2 x i32], i32 } %2, 2, 0
  %.fca.2.1.extract = extractvalue { i8 addrspace(1)*, i32, [2 x i32], i32 } %2, 2, 1
  %.fca.3.extract = extractvalue { i8 addrspace(1)*, i32, [2 x i32], i32 } %2, 3
  %3 = call {}*** @julia.get_pgcstack()
  %4 = call i32 @llvm.nvvm.read.ptx.sreg.ctaid.x(), !dbg !10, !range !23
  %5 = add i32 %4, 1, !dbg !24
  %6 = sub i32 %5, 1, !dbg !27
  %7 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x(), !dbg !29, !range !36
  %8 = mul i32 %6, %7, !dbg !37
  %9 = call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !39, !range !46
  %10 = add i32 %9, 1, !dbg !47
  %11 = add i32 %8, %10, !dbg !48
  %12 = sub i32 %11, 1, !dbg !49
  %13 = bitcast i8 addrspace(1)* %.fca.0.extract11 to float addrspace(1)*, !dbg !50
  %14 = getelementptr inbounds float, float addrspace(1)* %13, i32 %12, !dbg !50
  %15 = load float, float addrspace(1)* %14, align 4, !dbg !50, !tbaa !66
  %16 = sub i32 %11, 1, !dbg !49
  %17 = bitcast i8 addrspace(1)* %.fca.0.extract1 to float addrspace(1)*, !dbg !50
  %18 = getelementptr inbounds float, float addrspace(1)* %17, i32 %16, !dbg !50
  %19 = load float, float addrspace(1)* %18, align 4, !dbg !50, !tbaa !66
  %20 = fadd float %15, %19, !dbg !69
  %21 = sub i32 %11, 1, !dbg !72
  %22 = bitcast i8 addrspace(1)* %.fca.0.extract to float addrspace(1)*, !dbg !73
  %23 = getelementptr inbounds float, float addrspace(1)* %22, i32 %21, !dbg !73
  store float %20, float addrspace(1)* %23, align 4, !dbg !73, !tbaa !66
  ret void, !dbg !85
}
*** IR Dump After Combine redundant instructions (instcombine) ***
define ptx_kernel void @kernel({ i8 addrspace(1)*, i32, [2 x i32], i32 } %0, { i8 addrspace(1)*, i32, [2 x i32], i32 } %1, { i8 addrspace(1)*, i32, [2 x i32], i32 } %2) local_unnamed_addr #1 !dbg !8 {
conversion:
  %.fca.0.extract11 = extractvalue { i8 addrspace(1)*, i32, [2 x i32], i32 } %0, 0
  %.fca.0.extract1 = extractvalue { i8 addrspace(1)*, i32, [2 x i32], i32 } %1, 0
  %.fca.0.extract = extractvalue { i8 addrspace(1)*, i32, [2 x i32], i32 } %2, 0
  %3 = call {}*** @julia.get_pgcstack()
  %4 = call i32 @llvm.nvvm.read.ptx.sreg.ctaid.x(), !dbg !10, !range !23
  %5 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x(), !dbg !24, !range !31
  %6 = mul i32 %4, %5, !dbg !32
  %7 = call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !35, !range !42
  %8 = add i32 %6, %7, !dbg !43
  %9 = bitcast i8 addrspace(1)* %.fca.0.extract11 to float addrspace(1)*, !dbg !45
  %10 = sext i32 %8 to i64, !dbg !45
  %11 = getelementptr inbounds float, float addrspace(1)* %9, i64 %10, !dbg !45
  %12 = load float, float addrspace(1)* %11, align 4, !dbg !45, !tbaa !61
  %13 = add i32 %6, %7, !dbg !43
  %14 = bitcast i8 addrspace(1)* %.fca.0.extract1 to float addrspace(1)*, !dbg !45
  %15 = sext i32 %13 to i64, !dbg !45
  %16 = getelementptr inbounds float, float addrspace(1)* %14, i64 %15, !dbg !45
  %17 = load float, float addrspace(1)* %16, align 4, !dbg !45, !tbaa !61
  %18 = fadd float %12, %17, !dbg !64
  %19 = add i32 %6, %7, !dbg !67
  %20 = bitcast i8 addrspace(1)* %.fca.0.extract to float addrspace(1)*, !dbg !68
  %21 = sext i32 %19 to i64, !dbg !68
  %22 = getelementptr inbounds float, float addrspace(1)* %20, i64 %21, !dbg !68
  store float %18, float addrspace(1)* %22, align 4, !dbg !68, !tbaa !61
  ret void, !dbg !80
}

Not sure why instcombine introduces i64 here. DL issue?
cc @vchuravy

EDIT: yeah the DL has an IndexType, let's try setting that.

@maleadt maleadt mentioned this pull request May 9, 2023
Merged
@maleadt maleadt merged commit 4e0acc0 into master May 10, 2023
@maleadt maleadt deleted the tb/pointerref_int32 branch May 10, 2023 14:38
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