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@merldsu

MERL_DSU

README.md

We are from Microelectronics Research Lab (MERL-DSU). MERL is an non-profitable organization with an ambitious plan to lead Microelectronics Research & Development in Pakistan. MERL is working with a Vision to enable Pakistan to become a recognized global player in the microelectronics industry. MERL's Mission is to train Undergraduate Students of Pakistan in the field of ASIC designing.

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  1. PY_UVM_Framework PY_UVM_Framework Public

    This repo contain the PY-UVM Framework for different RISC-V Cores

    Python 31

  2. SAP_FPU SAP_FPU Public

    This repository contains the Simple As Possible Floating Point Unit design based on the IEEE-754 Standard.

    Verilog 18 4

  3. RISCV_Pipeline_Core RISCV_Pipeline_Core Public

    This repository contains the design files of RISC-V Pipeline Core

    Verilog 30 9

  4. PY_UVM_Tutorial PY_UVM_Tutorial Public

    This repository will contain all the files regarding the Py-UVM tutorial

    Python 2

  5. RISCV_Single_Cycle_Core RISCV_Single_Cycle_Core Public

    This repository contains the design files of RISC-V Single Cycle Core

    Verilog 26 8

  6. Logisim Logisim Public

    Mastering Digital Logic Design with Logisim: From Basics to CPU

    6

Repositories

Showing 8 of 8 repositories
  • Logisim Public

    Mastering Digital Logic Design with Logisim: From Basics to CPU

    merldsu/Logisim’s past year of commit activity
    6 Apache-2.0 0 0 0 Updated Oct 31, 2024
  • RISCV_Single_Cycle_Core Public

    This repository contains the design files of RISC-V Single Cycle Core

    merldsu/RISCV_Single_Cycle_Core’s past year of commit activity
    Verilog 26 Apache-2.0 8 0 0 Updated Dec 14, 2023
  • PY_UVM_Framework Public

    This repo contain the PY-UVM Framework for different RISC-V Cores

    merldsu/PY_UVM_Framework’s past year of commit activity
    Python 31 Apache-2.0 0 0 0 Updated Sep 16, 2023
  • SAP_FPU_Verification Public

    This repository contains the Graphical User Interface (GUI) of the Verification Environment of SAP-FPU.

    merldsu/SAP_FPU_Verification’s past year of commit activity
    1 Apache-2.0 1 0 0 Updated Sep 14, 2023
  • PY_UVM_Tutorial Public

    This repository will contain all the files regarding the Py-UVM tutorial

    merldsu/PY_UVM_Tutorial’s past year of commit activity
    Python 2 Apache-2.0 0 0 0 Updated Aug 21, 2023
  • RISCV_Pipeline_Core Public

    This repository contains the design files of RISC-V Pipeline Core

    merldsu/RISCV_Pipeline_Core’s past year of commit activity
    Verilog 30 Apache-2.0 9 0 0 Updated May 11, 2023
  • .github Public

    We are from Microelectronics Research Lab (MERL-DSU). MERL is an non-profitable organization with an ambitious plan to lead Microelectronics Research & Development in Pakistan. MERL is working with a Vision to enable Pakistan to become a recognized global player in the microelectronics industry.

    merldsu/.github’s past year of commit activity
    0 0 0 0 Updated Apr 28, 2023
  • SAP_FPU Public

    This repository contains the Simple As Possible Floating Point Unit design based on the IEEE-754 Standard.

    merldsu/SAP_FPU’s past year of commit activity
    Verilog 18 Apache-2.0 4 0 0 Updated Mar 17, 2023

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