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V0.3.0 (beta)

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@mschlegel81 mschlegel81 released this 11 Apr 19:58
· 323 commits to master since this release

First release.

Functionality:

  • Basic (binary) logic gates can be arranged by mouse
  • Wire widths: 1,4 and 8 bit
  • Rudimentary gate analysis functionality
  • Circuit boards can be used as "prototypes" to design new building blocks