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@mthudaaa
mthudaaa committed Oct 30, 2024
1 parent 0d302f1 commit 4a1b99e
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Empty file modified mag/delay_element.mag
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208 changes: 100 additions & 108 deletions mag/phase_detector.ext
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Original file line number Diff line number Diff line change
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timestamp 1729978159
timestamp 1730264365
version 8.3
tech sky130A
style ngspice()
scale 1000 1 500000
resistclasses 4400000 2200000 950000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12800 125 125 47 47 29 5
use sky130_fd_pr__nfet_01v8_TGNW9T XM6 0 -1 -757 1 0 -234
use sky130_fd_pr__nfet_01v8_TGNW9T XM7 0 -1 -757 1 0 -550
use sky130_fd_pr__nfet_01v8_TGNW9T XM9 0 1 908 -1 0 -234
use sky130_fd_pr__nfet_01v8_TGNW9T XM10 0 1 908 -1 0 -550
use sky130_fd_sc_hd__nand2_1 x1 1 0 -202 0 1 499
use sky130_fd_pr__pfet_01v8_R8XU9D XM2 0 1 -759 -1 0 554
use sky130_fd_pr__pfet_01v8_R8XU9D XM5 0 1 -759 -1 0 238
use sky130_fd_sc_hd__nand2_1 x2 1 0 74 0 1 499
use sky130_fd_pr__pfet_01v8_R8XU9D XM4 0 1 910 -1 0 554
use sky130_fd_pr__pfet_01v8_R8XU9D XM8 0 1 910 -1 0 238
use sky130_fd_pr__pfet_01v8_R8XU9D XM1 0 1 -759 -1 0 870
use sky130_fd_pr__pfet_01v8_R8XU9D XM3 0 1 910 -1 0 870
port "inp" 2 -1278 379 -1221 431 m1
port "inn" 1 -1266 845 -1209 897 m1
port "vssa" 3 -1257 -733 -1200 -681 m1
port "outn" 6 190 371 222 400 m2
port "out" 4 -52 364 -20 393 m2
port "vdda" 0 -1256 1017 -1199 1069 m1
node "m1_1040_n267#" 0 0 1040 -267 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
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node "m1_720_n583#" 0 0 720 -583 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
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node "m1_1160_575#" 0 0 1160 575 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
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node "m1_n418_521#" 0 0 -418 521 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "m1_n418_837#" 0 0 -418 837 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
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node "inp" 0 0 -1278 379 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
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node "vssa" 0 0 -1257 -733 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "outn" 0 0 190 371 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "li_262_714#" 0 0 262 714 v0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "out" 0 0 -52 364 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "li_n183_710#" 0 0 -183 710 v0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
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node "li_523_1011#" 0 0 523 1011 v0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "vdda" 0 0 -1256 1017 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "w_365_760#" 0 0 365 760 nw 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
use sky130_fd_sc_hdll__nand2_1 x1 1 0 -100 0 1 657
use sky130_fd_pr__nfet_01v8_TGNW9T XM6 0 -1 -864 1 0 707
use sky130_fd_pr__nfet_01v8_TGNW9T XM7 0 1 -864 -1 0 391
use sky130_fd_sc_hdll__nand2_1 x2 1 0 268 0 1 657
use sky130_fd_pr__nfet_01v8_TGNW9T XM9 0 1 1402 -1 0 707
use sky130_fd_pr__nfet_01v8_TGNW9T XM10 0 1 1402 -1 0 391
use sky130_fd_pr__pfet_01v8_R8XU9D XM2 0 -1 -655 1 0 1445
use sky130_fd_pr__pfet_01v8_R8XU9D XM5 0 1 -655 -1 0 1129
use sky130_fd_pr__pfet_01v8_R8XU9D XM4 0 1 1193 -1 0 1445
use sky130_fd_pr__pfet_01v8_R8XU9D XM8 0 1 1193 -1 0 1129
use sky130_fd_pr__pfet_01v8_R8XU9D XM1 0 1 -655 -1 0 1761
use sky130_fd_pr__pfet_01v8_R8XU9D XM3 0 1 1193 -1 0 1761
port "INP" 3 -1166 1429 -1130 1459 v
port "INN" 2 -1166 1739 -1130 1769 m2
port "VSSA" 1 -1152 193 -1096 259 m1
port "OUTN" 6 712 749 748 779 m2
port "OUT" 4 -237 749 -201 779 m2
port "VDDA" 0 -1152 1887 -1096 1953 m1
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node "m1_n324_1412#" 0 0 -324 1412 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "m1_n324_1590#" 0 0 -324 1590 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "m1_n955_1466#" 0 0 -955 1466 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "INP" 0 0 -1166 1429 v 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "INN" 0 0 -1166 1739 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "VSSA" 0 0 -1152 193 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "OUTN" 0 0 712 749 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
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node "VDDA" 0 0 -1152 1887 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
merge "XM3/VSUBS" "XM1/VSUBS" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
merge "XM1/VSUBS" "XM8/VSUBS"
merge "XM3/VSUBS" "XM8/VSUBS" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
merge "XM8/VSUBS" "XM4/VSUBS"
merge "XM4/VSUBS" "XM10/a_15_n100#"
merge "XM10/a_15_n100#" "XM10/a_n175_n274#"
merge "XM4/VSUBS" "XM10/a_n175_n274#"
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merge "XM9/a_n175_n274#" "x2/VNB"
merge "x2/VNB" "x2/VGND"
merge "x2/VGND" "XM5/VSUBS"
merge "x2/VGND" "x1/VGND"
merge "x1/VGND" "XM1/VSUBS"
merge "XM1/VSUBS" "XM5/VSUBS"
merge "XM5/VSUBS" "XM2/VSUBS"
merge "XM2/VSUBS" "x1/VNB"
merge "x1/VNB" "x1/VGND"
merge "x1/VGND" "XM7/a_n73_n100#"
merge "XM7/a_n73_n100#" "XM7/a_n175_n274#"
merge "XM7/a_n175_n274#" "vssa"
merge "vssa" "XM6/a_n175_n274#"
merge "XM6/a_n175_n274#" "VSUBS"
merge "x2/A" "XM8/a_15_n300#" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
merge "XM8/a_15_n300#" "XM4/a_15_n300#"
merge "XM2/VSUBS" "XM7/a_n175_n274#"
merge "XM7/a_n175_n274#" "VSSA"
merge "VSSA" "XM6/a_n175_n274#"
merge "XM6/a_n175_n274#" "x1/VNB"
merge "x1/VNB" "VSUBS"
merge "XM8/a_15_n300#" "XM4/a_15_n300#" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
merge "XM4/a_15_n300#" "XM9/a_n73_n100#"
merge "XM9/a_n73_n100#" "XM5/a_n33_n397#"
merge "XM5/a_n33_n397#" "m1_n1156_205#"
merge "m1_n1156_205#" "XM6/a_n33_n188#"
merge "XM6/a_n33_n188#" "li_262_714#"
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merge "XM5/a_n33_n397#" "m1_n314_1096#"
merge "m1_n314_1096#" "XM6/a_n33_n188#"
merge "XM6/a_n33_n188#" "m1_n732_674#"
merge "m1_n732_674#" "li_492_872#"
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merge "INN" "XM4/a_n33_n397#"
merge "XM4/a_n33_n397#" "m1_n324_1590#"
merge "m1_n324_1590#" "XM10/a_n33_n188#"
merge "XM10/a_n33_n188#" "m1_1524_1412#"
merge "m1_1524_1412#" "m1_1214_358#"
merge "x2/B" "x1/Y" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
merge "x1/Y" "out"
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merge "XM2/a_n73_n300#" "m1_n1059_575#"
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merge "m1_1251_837#" "XM2/a_n33_n397#"
merge "XM2/a_n33_n397#" "m1_n418_521#"
merge "m1_n418_521#" "XM7/a_n33_n188#"
merge "XM7/a_n33_n188#" "m1_n625_n583#"
merge "m1_n625_n583#" "inp"
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merge "XM3/w_n211_n519#" "XM8/w_n211_n519#"
merge "x1/Y" "OUT"
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merge "XM8/a_n73_n300#" "x2/VPWR"
merge "x2/VPWR" "XM5/a_n73_n300#"
merge "XM5/a_n73_n300#" "x1/VPWR"
merge "x1/VPWR" "VDDA"
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merge "XM8/w_n211_n519#" "XM4/w_n211_n519#"
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merge "XM5/a_n73_n300#" "vdda"
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merge "x1/VPB" "XM2/w_n211_n519#"
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merge "outn" "x1/A"
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merge "XM1/w_n211_n519#" "XM5/w_n211_n519#"
merge "XM5/w_n211_n519#" "XM2/w_n211_n519#"
merge "XM2/w_n211_n519#" "x1/VPB"
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merge "m1_796_1096#" "XM9/a_n33_n188#"
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merge "m1_1214_674#" "XM5/a_15_n300#"
merge "XM5/a_15_n300#" "XM2/a_n73_n300#"
merge "XM2/a_n73_n300#" "XM6/a_15_n100#"
merge "XM6/a_15_n100#" "x1/B"
merge "x1/B" "li_n64_872#"
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merge "XM9/a_15_n100#" "m1_883_n523#"
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merge "XM8/a_n33_n397#" "m1_1251_205#"
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merge "m1_1040_n267#" "XM5/a_15_n300#"
merge "XM5/a_15_n300#" "XM2/a_15_n300#"
merge "XM2/a_15_n300#" "XM6/a_15_n100#"
merge "XM6/a_15_n100#" "li_n183_710#"
merge "XM9/a_15_n100#" "m1_1302_412#"
merge "XM7/a_n73_n100#" "XM6/a_n73_n100#" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
merge "XM6/a_n73_n100#" "m1_n814_412#"
merge "XM3/a_n33_n397#" "m1_1534_1728#" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
merge "m1_1534_1728#" "XM2/a_n33_n397#"
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merge "m1_n324_1412#" "XM7/a_n33_n188#"
merge "XM7/a_n33_n188#" "m1_n732_358#"
merge "m1_n732_358#" "INP"
merge "XM3/a_15_n300#" "XM4/a_n73_n300#" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
merge "XM4/a_n73_n300#" "m1_1160_575#"
merge "XM7/a_15_n100#" "XM6/a_n73_n100#" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
merge "XM6/a_n73_n100#" "m1_n781_n523#"
merge "XM1/a_n33_n397#" "m1_n418_837#" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
merge "m1_n418_837#" "XM4/a_n33_n397#"
merge "XM4/a_n33_n397#" "m1_513_521#"
merge "m1_513_521#" "XM10/a_n33_n188#"
merge "XM10/a_n33_n188#" "inn"
merge "inn" "m1_720_n583#"
merge "XM4/a_n73_n300#" "m1_1443_1466#"
merge "x2/Y" "OUTN" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
merge "OUTN" "x1/A"
merge "x1/A" "li_124_872#"
merge "XM1/a_15_n300#" "XM2/a_15_n300#" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
merge "XM2/a_15_n300#" "m1_n955_1466#"
32 changes: 32 additions & 0 deletions mag/phase_detector.ext.spc
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Original file line number Diff line number Diff line change
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* NGSPICE file created from phase_detector.ext - technology: sky130A

.subckt sky130_fd_sc_hdll__nand2_1 A B VGND VNB VPB VPWR Y
X0 VPWR A Y VPB sky130_fd_pr__pfet_01v8_hvt ad=0.27 pd=2.54 as=0.145 ps=1.29 w=1 l=0.18
X1 Y A a_123_47# VNB sky130_fd_pr__nfet_01v8 ad=0.2015 pd=1.92 as=0.08775 ps=0.92 w=0.65 l=0.15
X2 a_123_47# B VGND VNB sky130_fd_pr__nfet_01v8 ad=0.08775 pd=0.92 as=0.2015 ps=1.92 w=0.65 l=0.15
X3 Y B VPWR VPB sky130_fd_pr__pfet_01v8_hvt ad=0.145 pd=1.29 as=0.27 ps=2.54 w=1 l=0.18
.ends

.subckt sky130_fd_pr__pfet_01v8_R8XU9D a_n33_n397# a_n73_n300# a_15_n300# w_n211_n519#
X0 a_15_n300# a_n33_n397# a_n73_n300# w_n211_n519# sky130_fd_pr__pfet_01v8 ad=0.87 pd=6.58 as=0.87 ps=6.58 w=3 l=0.15
.ends

.subckt sky130_fd_pr__nfet_01v8_TGNW9T a_n73_n100# a_n33_n188# a_15_n100# a_n175_n274#
X0 a_15_n100# a_n33_n188# a_n73_n100# a_n175_n274# sky130_fd_pr__nfet_01v8 ad=0.29 pd=2.58 as=0.29 ps=2.58 w=1 l=0.15
.ends

.subckt phase_detector VDDA VSSA INN INP OUT OUTN
Xx1 OUTN x1/B VSSA VSSA VDDA VDDA OUT sky130_fd_sc_hdll__nand2_1
Xx2 x2/A OUT VSSA VSSA VDDA VDDA OUTN sky130_fd_sc_hdll__nand2_1
XXM1 INN XM1/a_n73_n300# m1_n955_1466# VDDA sky130_fd_pr__pfet_01v8_R8XU9D
XXM2 INP x1/B m1_n955_1466# VDDA sky130_fd_pr__pfet_01v8_R8XU9D
XXM3 INP XM3/a_n73_n300# m1_1443_1466# VDDA sky130_fd_pr__pfet_01v8_R8XU9D
XXM4 INN m1_1443_1466# x2/A VDDA sky130_fd_pr__pfet_01v8_R8XU9D
XXM5 x2/A VDDA x1/B VDDA sky130_fd_pr__pfet_01v8_R8XU9D
XXM6 m1_n814_412# x2/A x1/B VSSA sky130_fd_pr__nfet_01v8_TGNW9T
XXM7 m1_n814_412# INP XM7/a_15_n100# VSSA sky130_fd_pr__nfet_01v8_TGNW9T
XXM8 x1/B VDDA x2/A VDDA sky130_fd_pr__pfet_01v8_R8XU9D
XXM9 x2/A x1/B m1_1302_412# VSSA sky130_fd_pr__nfet_01v8_TGNW9T
XXM10 m1_1302_412# INN XM10/a_15_n100# VSSA sky130_fd_pr__nfet_01v8_TGNW9T
.ends

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