Add legacy compatibility for Mojo

mufpga · Dec 7, 2021 · 70d121f · 70d121f
1 parent 659a836
commit 70d121f
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Showing 2 changed files with 17 additions and 8 deletions.
diff --git a/microfpga/controller.py b/microfpga/controller.py
@@ -1,6 +1,7 @@
 from microfpga import signals
 from microfpga import regint
 
+
 class MicroFPGA:
 
     def __init__(self, n_laser=0, n_ttl=0, n_servo=0, n_pwm=0, n_ai=0, use_camera=True):
@@ -17,9 +18,7 @@ def __init__(self, n_laser=0, n_ttl=0, n_servo=0, n_pwm=0, n_ai=0, use_camera=Tr
             self._id = self._serial.read(signals.ADDR_ID)
 
             if (self._version == signals.CURR_VER) and \
-                    (self._id == signals.ID_AU or
-                     self._id == signals.ID_AUP or
-                     self._id == signals.ID_CU):
+                    self._id in signals.get_compatible_ids():
                 # instantiate lasers
                 for i in range(n_laser):
                     self._lasers.append(signals.LaserTrigger(i, self._serial))
@@ -37,7 +36,7 @@ def __init__(self, n_laser=0, n_ttl=0, n_servo=0, n_pwm=0, n_ai=0, use_camera=Tr
                     self._pwms.append(signals.Pwm(i, self._serial))
 
                 # instantiate analog inputs
-                if self._id == signals.ID_AU:
+                if self._id in signals.get_analog_ids():
                     for i in range(n_ai):
                         self._ais.append(signals.Analog(i, self._serial))
 
@@ -58,11 +57,10 @@ def __init__(self, n_laser=0, n_ttl=0, n_servo=0, n_pwm=0, n_ai=0, use_camera=Tr
                     raise Warning('Wrong version: expected ' + str(signals.CURR_VER) + \
                                   ', got ' + str(self._version) + '. The port has been disconnected')
 
-                if self._id != signals.ID_AU and \
-                        self._id != signals.ID_AUP and \
-                        self._id != signals.ID_CU:
+                if not (self._id in signals.get_compatible_ids()):
                     raise Warning(f'Wrong board id: expected {signals.ID_AU} (Au),'
-                                  f' {signals.ID_AUP} (Au+) or {signals.ID_CU} (Cu),'
+                                  f' {signals.ID_AUP} (Au+), {signals.ID_CU} (Cu) or'
+                                  f' {signals.ID_MOJO} (Mojo),'
                                   f' got {self._id}. The port has been disconnected')
 
     def __enter__(self):
@@ -332,5 +330,7 @@ def get_id(self):
             return 'Au+'
         elif self._id == signals.ID_CU:
             return 'Cu'
+        elif self._id == signals.ID_MOJO:
+            return 'Mojo'
         else:
             return 'Unknown'
diff --git a/microfpga/signals.py b/microfpga/signals.py
@@ -32,6 +32,7 @@
 ID_AU = 79
 ID_AUP = 80
 ID_CU = 29
+ID_MOJO = 12
 
 MAX_MODE = 4
 MAX_DURATION = 65535
@@ -72,6 +73,14 @@ def format_sequence(string):
         return -1
 
 
+def get_compatible_ids():
+    return ID_AU, ID_AUP, ID_CU, ID_MOJO
+
+
+def get_analog_ids():
+    return ID_AU, ID_AUP, ID_MOJO
+
+
 class Signal(ABC):
 
     def __init__(self, channel_id: int, serial_com: regint.RegisterInterface, output: bool = True):