Skip to content

nathanielcaron/ece4242pg1

Repository files navigation

ECE 4242 - Computer Architecture

Project Group 1

Maxime Boudreau

Nathaniel Caron

Sahil Saini

Tye Shutty

Reference system features a 16 bit bus for communication between the processor and the main memory.

ece4242_cpu_ram_diagram

Enhanced system features a 16 bit bus for communication between the processor and the cache and another 32 bit bus for communication between the cache and the main memory.

ece4242_cpu_cache_ram_diagram_single_port

Enhanced system w/ dual port memory features a 16 bit bus for communication between the processor and the cache and two 32 bit bus for communication between the cache and the main memory.

ece4242_cpu_cache_ram_diagram

About

ECE 4242 - Computer Architecture

Resources

Stars

Watchers

Forks

Releases

No releases published

Packages

No packages published

Contributors 4

  •  
  •  
  •  
  •  

Languages