Test, Debugging, Benchmarking and Verification setup for NIST Ion Storage DDS and TTL boxes.
- https://github.com/m-labs/migen
- https://github.com/m-labs/misoc
- https://github.com/jordens/nist-dds-ttl-tester
- Xilinx ISE, xc3sprog urjtag, python3
- [email protected]:qcpapilio-adapter.git (https://ions.nist.gov/gitweb/?p=qcpapilio-adapter.git;a=summary)
- Propagation Delay from FPGA outputs to TTLs is ~11ns (two transcievers and 50cm cable) typical.
- Direction switches take ~30ns (transciever times) typical.
- FUD and RST are inverted on the backplane.
From Sebastien:
You will need to install xc3sprog to write the flash. Make sure you use a recent version (my flash support patch was merged on Feb 14). You will also need the flash proxy bitstream from here: https://github.com/GadgetFactory/Papilio-Loader/blob/master/xc3sprog/trunk/bscan_spi/bscan_spi_lx9_papilio.bit Place it in ~/.mlabs, /usr/local/share/mlabs, or /usr/share/mlabs.
Then run from MiSoC: ./make.py -X ../nist-dds-ttl-tester -t ddsttltester all This will compile and flash the bitstream and BIOS. After this, run flterm --port /dev/ttyUSB1 and press the reconfiguration button on the Papilio Pro. It should start the BIOS and display the boot messages on the terminal.
The test software is in the "software" directory of nist-dds-ttl-tester. After setting the MSCDIR environment variable to the MiSoC path, run "make" to compile it. Then you can load it with flterm: flterm --port /dev/ttyUSB1 --kernel tester.bin (and run "serialboot" at the BIOS prompt) ... or program it into the flash for the BIOS to boot automatically, with: make flash FLASH_PROXY=/path_to/bscan_spi_lx9_papilio.bit
If you modify the gateware, note that there is a problem with the load-bitstream action of make.py - the result of which is the BIOS fails to start. This does not happen when UrJTAG is used instead of xc3sprog, or when the BIOS is not XIP. With UrJTAG, use the following commands: cable Flyswatter detect pld load build/build/ddsttltestersoc-papilio_pro.bit You can also write the bitstream to the flash every time.
Running one cycle of tests on all DDS, DDS 7 being broken:
tester> ddstest 1 readback fail on DDS 7, 0x00000000 != 0xaaaaaaaa readback fail on DDS 7, 0x00000000 != 0x55555555 readback fail on DDS 7, 0x00000000 != 0xa5a5a5a5 readback fail on DDS 7, 0x00000000 != 0x5a5a5a5a readback fail on DDS 7, 0x00000000 != 0xffffffff readback fail on DDS 7, 0x00000000 != 0x12345678 readback fail on DDS 7, 0x00000000 != 0x87654321 readback fail on DDS 7, 0x00000000 != 0x0000ffff readback fail on DDS 7, 0x00000000 != 0xffff0000 readback fail on DDS 7, 0x00000000 != 0x00ff00ff readback fail on DDS 7, 0x00000000 != 0xff00ff00 tester> tester> help NIST DDS/TTL Tester Available commands: help - this message revision - display revision inputs - read inputs ttlout <n> - output ttl ttlin - read ttll ddssel <n> - select a dds ddsinit - reset, cfr, fud dds ddsreset - reset dds ddsw <a> <d> - write to dds register ddsr <a> - read dds register ddsfud - pulse FUD ddsftw <n> <d> - write FTW ddstest <n> - perform test sequence on dds leds <n> - set leds