[WIP] aievec tests through aiesim

compiler/plugins/target/AMD-AIE/aievec/ConvertVectorToAIEVec.cpp

@@ -114,3 +114,12 @@ void mlir::iree_compiler::aievec::buildConvertVectorToAIEVec(
   pm.addPass(createLoopInvariantCodeMotionPass());
   pm.addPass(createCanonicalizerPass());
 }
+
+void mlir::iree_compiler::aievec::registerAIEVecPipelines() {
+  PassPipelineRegistration<>(
+      "convert-vector-to-aievec",
+      "This pass pipeline takes standard \"Vector\" code and converts it to "
+      "\"AIEVec\" code targeting the selected Xilinx AIE vector "
+      "architecture.",
+      buildConvertVectorToAIEVec);
+}

compiler/plugins/target/AMD-AIE/aievec/Passes.h

@@ -48,9 +48,10 @@ void buildLowerVectorToAIEVec(mlir::OpPassManager &pm);
 
 /**
  * A pass containing patterns for lowering operations in the vector dialect to
- * the AIEVec dialect. The pass is currently named `test-lower-vector-to-aievec`.
+ * the AIEVec dialect. The pass is currently named
+ * `test-lower-vector-to-aievec`.
  */
-static std::unique_ptr<mlir::Pass> createLowerVectorToAIEVec();
+std::unique_ptr<mlir::Pass> createLowerVectorToAIEVec();
 
 /**
  * Expose the pass `test-lower-vector-to-aievec` to the command line.
@@ -67,9 +68,14 @@ void buildConvertVectorToAIEVec(mlir::OpPassManager &);
 /**
  * Lower from the vector dialect to the AIEVec dialect. The pass is called
  * `convert-aievec-to-llvm`.
- * */
+ */
 std::unique_ptr<mlir::Pass> createConvertAIEVecToLLVMPass();
 
+/**
+ * Register all pipelines for the AIE Vector dialect.
+ */
+void registerAIEVecPipelines();
+
 /**
  * Expose the pass `convert-aievec-to-llvm` to the command line.
  */

compiler/plugins/target/AMD-AIE/aievec/VectorToAIEVecConversions.cpp

@@ -1077,12 +1077,12 @@ struct LowerVectorToAIEVec : PassWrapper<LowerVectorToAIEVec, OperationPass<>> {
 //============================================================================//
 
 namespace mlir::iree_compiler::aievec {
-static std::unique_ptr<Pass> createLowerVectorToAIEVec() {
+std::unique_ptr<Pass> createLowerVectorToAIEVec() {
   return std::make_unique<LowerVectorToAIEVec>();
 }
 
 void registerLowerVectorToAIEVecPass() {
-  ::mlir::registerPass([]() -> std::unique_ptr<mlir::Pass> {
+  mlir::registerPass([]() -> std::unique_ptr<mlir::Pass> {
     return createLowerVectorToAIEVec();
   });
 }

compiler/plugins/target/AMD-AIE/aievec/test/CMakeLists.txt

@@ -13,3 +13,5 @@ iree_lit_test_suite(
   LABELS
     "hostonly"
 )
+
+add_subdirectory(simulator)

compiler/plugins/target/AMD-AIE/aievec/test/simulator/64x32x64xbf16_4x8x4_packed_gemm/gemm-64x32x64-bf16.mlir

@@ -0,0 +1,54 @@
+// RUN: iree-opt %S/gemm-64x32x64-bf16.mlir --convert-vector-to-aievec -lower-affine -canonicalize -cse --convert-aievec-to-llvm --convert-scf-to-cf | iree-aie-translate --mlir-to-llvmir -o kernel.ll
+// RUN: clang -O2 --target=aie2-none-unknown-elf -c kernel.ll -o kernel.o
+// RUN: clang -O2 --target=aie2-none-unknown-elf -c testbench.cc -o testbench.o
+// RUN: clang --target=aie2-none-unknown-elf -Wl,--gc-sections -Wl,--orphan-handling=error -Wl,T,%S/ldfile -o test.exe
+// RUN: xca_udm_dbg -qf -T -P $AIETOOLS/data/aie_ml/lib -t "%S/../profiling.tcl ./testbench.exe" | FileCheck %s
+// RUN: cat checkers.output
+
+#map = affine_map<(d0, d1, d2) -> (d0, d2)>
+#map1 = affine_map<(d0, d1, d2) -> (d2, d1)>
+#map2 = affine_map<(d0, d1, d2) -> (d0, d1)>
+module {
+  func.func @gemm_64x32x64_bf16_packed_4x8x4(%A: memref<16x4x4x8xbf16>,
+                                             %B: memref<4x16x8x4xbf16>,
+                                             %C: memref<16x16x4x4xf32>) {
+    %c0 = arith.constant 0 : index
+    %c1 = arith.constant 1 : index
+    %c4 = arith.constant 4 : index
+    %c16 = arith.constant 16 : index
+    %c0_bf16 = arith.constant 0.000000e+00 : bf16
+    %c0_f32 = arith.constant 0.000000e+00 : f32
+    scf.for %i = %c0 to %c16 step %c1 {
+      scf.for %j = %c0 to %c16 step %c1 {
+        scf.for %k = %c0 to %c4 step %c1 {
+          %va = vector.transfer_read %A[%i, %k, %c0, %c0], %c0_bf16 :
+                                        memref<16x4x4x8xbf16>, vector<4x8xbf16>
+          %vb = vector.transfer_read %B[%k, %j, %c0, %c0], %c0_bf16 :
+                                        memref<4x16x8x4xbf16>, vector<8x4xbf16>
+          %vc = vector.transfer_read %C[%i, %j, %c0, %c0], %c0_f32 :
+                                        memref<16x16x4x4xf32>, vector<4x4xf32>
+          %vaf32 = arith.extf %va : vector<4x8xbf16> to vector<4x8xf32>
+          %vbf32 = arith.extf %vb : vector<8x4xbf16> to vector<8x4xf32>
+          %vr = vector.contract {
+                        indexing_maps = [#map, #map1, #map2],
+                        iterator_types = ["parallel", "parallel", "reduction"],
+                        kind = #vector.kind<add>}
+                      %vaf32, %vbf32, %vc :
+                      vector<4x8xf32>, vector<8x4xf32> into vector<4x4xf32>
+          vector.transfer_write %vr, %C[%i, %j, %c0, %c0] :
+                                        vector<4x4xf32>, memref<16x16x4x4xf32>
+        }
+      }
+    }
+    return
+  }
+}
+
+// CHECK-LABEL: N: 64, M: 64, K: 32
+// CHECK-LABEL: Running MATMUL...
+// CHECK: Cycle count: [[CC:[0-9]+]]
+// CHECK-LABEL: Finish MATMUL!
+// CHECK-LABEL: Compare the results
+// CHECK: PASSED, Max delta: [[MD:-?[0-9]+.[0-9]+]], pixel intensity
+
+// RUN: xchesscc -j1 -pme -P $AIETOOLS/data/aie_ml/lib -f -CRelease_LLVM -w work -D__AIENGINE__ -D__AIE_ARCH__=20 -D__AIEARCH__=20 -I $AIETOOLS/include kernel.ll -o kernel.o