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Rename + refactor + lit test fix
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Abhishek-Varma committed Aug 29, 2024
1 parent f99dd46 commit f797a36
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Showing 8 changed files with 23 additions and 25 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@
#include "mlir/IR/Iterators.h"
#include "mlir/Pass/Pass.h"

#define DEBUG_TYPE "iree-amdaie-split-logical-objectfifos"
#define DEBUG_TYPE "iree-amdaie-split-logical-objectfifos-for-connection-reuse"

namespace mlir::iree_compiler::AMDAIE {

Expand All @@ -33,19 +33,20 @@ static SmallVector<AMDAIE::DmaCpyNdOp> fetchDmaCpyNdOpsToSplit(
return l2ToL1DmaOps;
}

class AMDAIESplitLogicalObjectFifosPass
: public impl::AMDAIESplitLogicalObjectFifosBase<
AMDAIESplitLogicalObjectFifosPass> {
class AMDAIESplitLogicalObjFifosForConnectionReusePass
: public impl::AMDAIESplitLogicalObjFifosForConnectionReuseBase<
AMDAIESplitLogicalObjFifosForConnectionReusePass> {
public:
using AMDAIESplitLogicalObjectFifosBase::AMDAIESplitLogicalObjectFifosBase;
using AMDAIESplitLogicalObjFifosForConnectionReuseBase::
AMDAIESplitLogicalObjFifosForConnectionReuseBase;

void getDependentDialects(DialectRegistry &registry) const override {
registry.insert<AMDAIEDialect>();
}
void runOnOperation() override;
};

void AMDAIESplitLogicalObjectFifosPass::runOnOperation() {
void AMDAIESplitLogicalObjFifosForConnectionReusePass::runOnOperation() {
ModuleOp moduleOp = getOperation();
MLIRContext *context = &getContext();
IRRewriter rewriter(context);
Expand All @@ -60,8 +61,8 @@ void AMDAIESplitLogicalObjectFifosPass::runOnOperation() {

} // namespace

std::unique_ptr<Pass> createAMDAIESplitLogicalObjectFifosPass() {
return std::make_unique<AMDAIESplitLogicalObjectFifosPass>();
std::unique_ptr<Pass> createAMDAIESplitLogicalObjFifosForConnectionReusePass() {
return std::make_unique<AMDAIESplitLogicalObjFifosForConnectionReusePass>();
}

} // namespace mlir::iree_compiler::AMDAIE
Original file line number Diff line number Diff line change
Expand Up @@ -86,7 +86,7 @@ iree_cc_library(
"AMDAIEPad.cpp"
"AMDAIEPeelForLoop.cpp"
"AMDAIEPropagateDataLayout.cpp"
"AMDAIESplitLogicalObjectFifos.cpp"
"AMDAIESplitLogicalObjFifosForConnectionReuse.cpp"
"AMDAIETile.cpp"
"AMDAIETileAndFuse.cpp"
"AMDAIEUtils.cpp"
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Original file line number Diff line number Diff line change
Expand Up @@ -65,7 +65,7 @@ namespace mlir::iree_compiler::AMDAIE {
#define GEN_PASS_DEF_AMDAIEPAD
#define GEN_PASS_DEF_AMDAIEPEELFORLOOP
#define GEN_PASS_DEF_AMDAIEPROPAGATEDATALAYOUT
#define GEN_PASS_DEF_AMDAIESPLITLOGICALOBJECTFIFOS
#define GEN_PASS_DEF_AMDAIESPLITLOGICALOBJFIFOSFORCONNECTIONREUSE
#define GEN_PASS_DEF_AMDAIETILE
#define GEN_PASS_DEF_AMDAIETILEANDFUSE
#define GEN_PASS_DEF_AMDAIEVECTORIZATION
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -582,7 +582,7 @@ void addAMDAIEObjectFifoLoweringPasses(OpPassManager &passManager) {
passManager.addPass(createAMDAIEDistributeCoresAndObjectFifosPass());
passManager.addPass(createCSEPass());
passManager.addPass(createCanonicalizerPass());
passManager.addPass(createAMDAIESplitLogicalObjectFifosPass());
passManager.addPass(createAMDAIESplitLogicalObjFifosForConnectionReusePass());

passManager.addPass(createAMDAIEDmaToCircularDmaPass());
passManager.addNestedPass<func::FuncOp>(createAMDAIECreateAIEWorkgroupPass());
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -212,7 +212,7 @@ std::unique_ptr<Pass> createAMDAIEPeelForLoopPass(
AMDAIEPeelForLoopOptions options = {});

/// Create a pass to split buffers.
std::unique_ptr<Pass> createAMDAIESplitLogicalObjectFifosPass();
std::unique_ptr<Pass> createAMDAIESplitLogicalObjFifosForConnectionReusePass();

/// Create pass to tile TilingInterface operations.
std::unique_ptr<Pass> createAMDAIETilePass(AMDAIETileOptions options = {});
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Expand Up @@ -430,10 +430,10 @@ def AMDAIEPropagateDataLayout :
let constructor = "mlir::iree_compiler::AMDAIE::createAMDAIEPropagateDataLayoutPass()";
}

def AMDAIESplitLogicalObjectFifos :
Pass<"iree-amdaie-split-logical-objectfifos", "ModuleOp"> {
def AMDAIESplitLogicalObjFifosForConnectionReuse :
Pass<"iree-amdaie-split-logical-objectfifos-for-connection-reuse", "ModuleOp"> {
let summary = "Pass to split L2 buffers to share inputs of Matmul and Elementwise operations.";
let constructor = "mlir::iree_compiler::AMDAIE::createAMDAIESplitLogicalObjectFifosPass()";
let constructor = "mlir::iree_compiler::AMDAIE::createAMDAIESplitLogicalObjFifosForConnectionReusePass()";
}

def AMDAIETile :
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -57,7 +57,7 @@ iree_lit_test_suite(
"pad.mlir"
"peel_for_loop.mlir"
"propagate_data_layout.mlir"
"split_logical_objectfifos.mlir"
"split_logicalobjfifos_for_connection_reuse.mlir"
"tile_and_fuse_using_scf_for.mlir"
"tile_and_fuse_using_scf_forall.mlir"
"tile_copy_using_scf_for.mlir"
Expand Down
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// RUN: iree-opt --pass-pipeline="builtin.module(iree-amdaie-split-logical-objectfifos,cse)" --split-input-file --verify-diagnostics %s | FileCheck %s
// RUN: iree-opt --pass-pipeline="builtin.module(iree-amdaie-split-logical-objectfifos-for-connection-reuse,cse)" --split-input-file --verify-diagnostics %s | FileCheck %s

// Glossary:
// candidate core op : they are those amdaie.core ops which have at least three input dma ops.
Expand Down Expand Up @@ -429,8 +429,6 @@ module {
// CHECK-DAG: %[[C1:.*]] = arith.constant 1 : index
// CHECK-DAG: %[[C2:.*]] = arith.constant 2 : index
// CHECK-DAG: %[[C3:.*]] = arith.constant 3 : index
// CHECK-DAG: %[[C34:.*]] = arith.constant 34 : index
// CHECK-DAG: %[[C35:.*]] = arith.constant 35 : index
// CHECK-DAG: %[[L3_ALLOC:.*]] = memref.alloc() : memref<128x128xi32>
// CHECK-DAG: %[[L2_ALLOC_0:.*]] = memref.alloc() : memref<1x1x32x32xi32, 1 : i32>
// CHECK-DAG: %[[L2_ALLOC_1:.*]] = memref.alloc() : memref<1x1x32x32xi32, 1 : i32>
Expand All @@ -456,16 +454,16 @@ module {
// CHECK: scf.forall (%[[IV0:.*]], %[[IV1:.*]]) in (2, 2)
// CHECK: %[[DMA_CPY_ND_L3_TO_L2_0:.*]] = amdaie.dma_cpy_nd(
// CHECK-SAME: %[[L2_OBJECTFIFO_0]][0, 0, 0, 0] [1, 1, 32, 32] [2048, 1024, 32, 1]
// CHECK-SAME: %[[L3_OBJECTFIFO]][0, 0, %[[C3]], %[[C2]]] [1, 1, 32, 32] [4096, 32, 128, 1]
// CHECK-SAME: %[[L3_OBJECTFIFO]][0, 0, 3, 2] [1, 1, 32, 32] [4096, 32, 128, 1]
// CHECK: %[[DMA_CPY_ND_L3_TO_L2_1:.*]] = amdaie.dma_cpy_nd(
// CHECK-SAME: %[[L2_OBJECTFIFO_1]][0, 0, 0, 0] [1, 1, 32, 32] [2048, 1024, 32, 1]
// CHECK-SAME: %[[L3_OBJECTFIFO]][0, 0, %[[C3]], %[[C34]]] [1, 1, 32, 32] [4096, 32, 128, 1]
// CHECK-SAME: %[[L3_OBJECTFIFO]][0, 0, 3, 34] [1, 1, 32, 32] [4096, 32, 128, 1]
// CHECK: %[[DMA_CPY_ND_L3_TO_L2_2:.*]] = amdaie.dma_cpy_nd(
// CHECK-SAME: %[[L2_OBJECTFIFO_2]][0, 0, 0, 0] [1, 1, 32, 32] [2048, 1024, 32, 1]
// CHECK-SAME: %[[L3_OBJECTFIFO]][0, 0, %[[C35]], %[[C2]]] [1, 1, 32, 32] [4096, 32, 128, 1]
// CHECK-SAME: %[[L3_OBJECTFIFO]][0, 0, 35, 2] [1, 1, 32, 32] [4096, 32, 128, 1]
// CHECK: %[[DMA_CPY_ND_L3_TO_L2_3:.*]] = amdaie.dma_cpy_nd(
// CHECK-SAME: %[[L2_OBJECTFIFO_3]][0, 0, 0, 0] [1, 1, 32, 32] [2048, 1024, 32, 1]
// CHECK-SAME: %[[L3_OBJECTFIFO]][0, 0, %[[C35]], %[[C34]]] [1, 1, 32, 32] [4096, 32, 128, 1]
// CHECK-SAME: %[[L3_OBJECTFIFO]][0, 0, 35, 34] [1, 1, 32, 32] [4096, 32, 128, 1]
// CHECK: amdaie.logicalobjectfifo.from_memref
// CHECK: amdaie.logicalobjectfifo.from_memref
// CHECK: amdaie.dma_cpy_nd
Expand Down Expand Up @@ -785,8 +783,7 @@ module {
// CHECK-DAG: #map = affine_map<(d0) -> (d0 + 32)>
// CHECK-DAG: #map1 = affine_map<(d0) -> (d0)>
// CHECK: @block_argument_of_funcOp_offset
// CHECK-SAME: %[[ARG0:.*]]: index,
// CHECK-SAME: %[[ARG1:.*]]: index,
// CHECK-SAME: %[[ARG0:.*]]: index, %[[ARG1:.*]]: index,
// CHECK-DAG: %[[IV1_32:.*]] = affine.apply #map(%[[ARG1]])
// CHECK-DAG: %[[IV0_32:.*]] = affine.apply #map(%[[ARG0]])
// CHECK-DAG: %[[IV1_0:.*]] = affine.apply #map1(%[[ARG1]])
Expand Down

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