Skip to content

Commit

Permalink
Combine MISA and Winograd configs
Browse files Browse the repository at this point in the history
  • Loading branch information
nithinsubbiah committed Jun 19, 2024
1 parent 57aaf1d commit e5422a1
Show file tree
Hide file tree
Showing 5 changed files with 40 additions and 47 deletions.
21 changes: 0 additions & 21 deletions benchmark-scheduled-unet-misa.sh

This file was deleted.

2 changes: 1 addition & 1 deletion compile-scheduled-unet-tk.sh
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
#!/bin/bash

# Usage: PATH=/path/to/iree/build/tools:$PATH ./compile-scheduled-unet.sh <target-chip> <default|winograd|misa> [extra flags]
# Usage: PATH=/path/to/iree/build/tools:$PATH ./compile-scheduled-unet.sh <target-chip> <default|winograd|misa|hybrid> [extra flags]

set -euo pipefail

Expand Down
13 changes: 13 additions & 0 deletions compile-unet-base.sh
Original file line number Diff line number Diff line change
Expand Up @@ -19,10 +19,13 @@ readonly CHIP="$2"
readonly MODE="$3"
USE_WINOGRAD=0
USE_MISA=0
USE_WINOGRAD_AND_MISA=0
if [[ $MODE =~ "winograd" ]] ; then
USE_WINOGRAD=1
elif [[ $MODE =~ "misa" ]] ; then
USE_MISA=1
elif [[ $MODE =~ "hybrid" ]] ; then
USE_WINOGRAD_AND_MISA=1
fi

readonly ATTENTION_SPEC="$(realpath "$4")"
Expand Down Expand Up @@ -67,11 +70,21 @@ readonly MISA_FLAGS=(
"--iree-preprocessing-transform-spec-filename=${SPEC_DIR}/misa_unet_spec.mlir"
)

readonly WINOGRAD_AND_MISA_FLAGS=(
"--iree-opt-const-expr-max-size-increase-threshold=1000000000000000"
"--iree-preprocessing-pass-pipeline=${WINOGRAD_PIPELINE[*]}"
"--iree-hal-executable-object-search-path=${SPEC_DIR}"
"--iree-preprocessing-transform-spec-filename=${SPEC_DIR}/misa_unet_spec.mlir"
"--iree-preprocessing-pass-pipeline=${WINOGRAD_PIPELINE[*]}"
)

declare -a FLAGS=("${DEFAULT_FLAGS[*]}")
if [ "$USE_WINOGRAD" = 1 ] ; then
FLAGS=("${WINOGRAD_FLAGS[@]}")
elif [ "$USE_MISA" = 1 ] ; then
FLAGS=("${MISA_FLAGS[@]}")
elif [ "$USE_WINOGRAD_AND_MISA" = 1 ] ; then
FLAGS=("${WINOGRAD_AND_MISA_FLAGS[@]}")
fi

set -x
Expand Down
19 changes: 10 additions & 9 deletions specs/misa_unet_spec.mlir
Original file line number Diff line number Diff line change
Expand Up @@ -857,15 +857,16 @@ module attributes {transform.with_named_sequence} {
transform.foreach %funcs : !transform.any_op {
^bb1(%func: !transform.any_op):
transform.foreach_match in %func
@match_conv_k1 -> @cast_and_call_dag_k1,
@match_conv_k2 -> @cast_and_call_dag_k2,
@match_conv_k3 -> @cast_and_call_dag_k3,
@match_conv_k4 -> @cast_and_call_dag_k4,
@match_conv_k5 -> @cast_and_call_dag_k5,
@match_conv_k6 -> @cast_and_call_dag_k6,
@match_conv_k7 -> @cast_and_call_dag_k7,
@match_conv_k8 -> @cast_and_call_dag_k8,
@match_conv_k9 -> @cast_and_call_dag_k9
// base - 63.5 ms
@match_conv_k1 -> @cast_and_call_dag_k1, // -1.4 ms
// @match_conv_k2 -> @cast_and_call_dag_k2, // -0.1 ms
// @match_conv_k3 -> @cast_and_call_dag_k3, // -0.1 ms
// @match_conv_k4 -> @cast_and_call_dag_k4, // 0 ms
// @match_conv_k5 -> @cast_and_call_dag_k5, // -0.1 ms
// @match_conv_k6 -> @cast_and_call_dag_k6, // -0.1 ms
@match_conv_k7 -> @cast_and_call_dag_k7 // -0.5 ms
// @match_conv_k8 -> @cast_and_call_dag_k8, // -0.1 ms
// @match_conv_k9 -> @cast_and_call_dag_k9 // -0.2 ms
: (!transform.any_op) -> (!transform.any_op)
}
transform.apply_dce to %module : !transform.any_op
Expand Down
32 changes: 16 additions & 16 deletions specs/winograd_conv_spec.mlir
Original file line number Diff line number Diff line change
Expand Up @@ -453,24 +453,24 @@ module attributes { transform.with_named_sequence } {


transform.named_sequence @__transform_main(%func: !transform.any_op {transform.consumed}) {
transform.foreach_match in %func // Base: 69.4ms // Best: 67.3ms
transform.foreach_match in %func // Base: 63.5ms // Best: 60.5ms
// @match_conv2x4x128x128x3x3x320 -> @annotate_op, // fail to compile

@match_conv2x1280x64x64x3x3x1280 -> @annotate_op, // 68.8ms -0.6
@match_conv2x640x128x128x3x3x320 -> @annotate_op, // 68.9ms -0.5
@match_conv2x1920x64x64x3x3x640 -> @annotate_op, // 69.0ms -0.4
@match_conv2x960x128x128x3x3x320 -> @annotate_op, // 69.1ms -0.3
@match_conv2x640x128x128x3x3x640 -> @annotate_op, // 69.1ms -0.3
@match_conv2x1280x64x64x3x3x640 -> @annotate_op, // 69.2ms -0.2
@match_conv2x960x64x64x3x3x640 -> @annotate_op, // 69.2ms -0.2
// @match_conv2x320x64x64x3x3x640 -> @annotate_op, // 69.5ms -0.1
// @match_conv2x640x64x64x3x3x640 -> @annotate_op, // 69.3ms -0.1
// @match_conv2x2560x32x32x3x3x1280 -> @annotate_op, // 69.3ms -0.1
// @match_conv2x1920x32x32x3x3x1280 -> @annotate_op, // 69.4ms +0.0
// @match_conv2x640x32x32x3x3x1280 -> @annotate_op, // 69.5ms +0.1
// @match_conv2x320x128x128x3x3x320 -> @annotate_op, // 69.6ms +0.2
// @match_conv2x1280x32x32x3x3x1280 -> @annotate_op, // 69.7ms +0.3
// @match_conv2x320x128x128x3x3x4 -> @annotate_op, // 69.7ms +0.3
@match_conv2x1280x64x64x3x3x1280 -> @annotate_op, // 63.0ms -0.5
@match_conv2x640x128x128x3x3x320 -> @annotate_op, // 63.0ms -0.5
@match_conv2x1920x64x64x3x3x640 -> @annotate_op, // 63.2ms -0.3
@match_conv2x960x128x128x3x3x320 -> @annotate_op, // 63.1ms -0.4
@match_conv2x640x128x128x3x3x640 -> @annotate_op, // 63.0ms -0.5
@match_conv2x1280x64x64x3x3x640 -> @annotate_op, // 63.2ms -0.3
@match_conv2x960x64x64x3x3x640 -> @annotate_op, // 63.2ms -0.3
// @match_conv2x320x64x64x3x3x640 -> @annotate_op,
// @match_conv2x640x64x64x3x3x640 -> @annotate_op,
// @match_conv2x2560x32x32x3x3x1280 -> @annotate_op,
// @match_conv2x1920x32x32x3x3x1280 -> @annotate_op,
// @match_conv2x640x32x32x3x3x1280 -> @annotate_op,
// @match_conv2x320x128x128x3x3x320 -> @annotate_op,
// @match_conv2x1280x32x32x3x3x1280 -> @annotate_op,
// @match_conv2x320x128x128x3x3x4 -> @annotate_op,
@placeholder -> @annotate_op
: (!transform.any_op) -> (!transform.any_op)
transform.yield
Expand Down

0 comments on commit e5422a1

Please sign in to comment.