Skip to content

Effective Address Translation (Flat)

nonarkitten edited this page Jul 31, 2019 · 2 revisions

Generally, the main problem is with addressing memory. We'll use the 68020's base-displacement modes to add a 32-bit offset for all operations. This only needs to handle 68000 addressing modes.

In any addressing mode where the 68K code is already using a displacement; this displacement needs to be adjusted to long word with the base_addresses added to it. When handling 68000 original code, the address may need to be bound to a 16MB region and shouldn't "leak" into memory before or after.

     Original                Translated

000 nnn Dn              ->   000 nnn   Dn              Leave as-is
001 nnn An              ->   001 nnn   An              Leave as-is

010 nnn (An)            ->   110 nnn   (bd,An)         bd = pg
011 nnn (An)+           ->   110 nnn   (bd,An)         bd = pg; lea +width(An),An
100 nnn -(An)           ->   110 nnn   (bd,An)         lea -width(An),An; bd = pg
101 nnn (d16,An)        ->   110 nnn   (bd,An)         bd = pg + d16

110 nnn (d8,An,Xn)      ->   110 nnn   (bd,An,Xn)      bd = pg + d8

111 000 (xxx).W         ->   111 001   (xxx).L         xxx += pg
111 001 (xxx).L         ->   111 001   (xxx).L         xxx += pg
111 010 (d16,PC)        ->   111 001   (xxx).L         xxx = pg + d16 + PC
111 011 (d8,PC,Xn)      ->   110 nnn   (bd,Xn)         bd = pg + d8 + PC

Dn      Any data register
An      Any address register
Xn      Any register, data or address
pg      Page, the 16MB page (ideally aligned to 24-bit) where the emulated code lays
bd      The base-displacement, a 32-bit value provided to the opcode (2 words)
d8      The original 8-bit diplacement, this must be wrapped to 24-bits
d16     The original 16-bit diplacement, this must be wrapped to 24-bits
PC      At JIT we know the PC and can replace this with the actual address
Clone this wiki locally