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Merge pull request #113 from esc/fixup_pre-commit
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Fixup pre commit
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esc authored Apr 16, 2024
2 parents 3850458 + d010279 commit e54eeec
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Showing 5 changed files with 20 additions and 16 deletions.
14 changes: 7 additions & 7 deletions .pre-commit-config.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -5,37 +5,37 @@ exclude: |
repos:
# Checks for debug statements and merge conflicts
- repo: https://github.com/pre-commit/pre-commit-hooks
rev: v4.4.0
rev: v4.6.0
hooks:
- id: debug-statements
- id: check-merge-conflict
# Pyupgrade: upgrades older python syntax to newer one
- repo: https://github.com/asottile/pyupgrade
rev: v3.3.1
rev: v3.15.2
hooks:
- id: pyupgrade
args: ["--py38-plus"]
# Black
- repo: https://github.com/psf/black
rev: 23.1.0
rev: 24.4.0
hooks:
- id: black
language_version: python3
args: ["--line-length=79"]
# Autoflake: removes unused imports and variables
- repo: https://github.com/humitos/mirrors-autoflake.git
rev: v1.1
- repo: https://github.com/pycqa/autoflake
rev: v2.3.1
hooks:
- id: autoflake
args: ['--in-place', '--remove-all-unused-imports', '--remove-unused-variable']
# Manual Linting: Flake 8
- repo: https://github.com/pycqa/flake8
rev: 6.0.0
rev: 7.0.0
hooks:
- id: flake8
# Static Type checking: MyPy
- repo: https://github.com/pre-commit/mirrors-mypy
rev: v1.1.1
rev: v1.9.0
hooks:
- id: mypy
additional_dependencies:
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2 changes: 2 additions & 0 deletions makefile
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,8 @@ build:
python -m pip install -vv -e .
test:
pytest --pyargs numba_rvsdg
lint:
pre-commit run --all-files
docs:
cd docs && make html
conda-env:
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4 changes: 2 additions & 2 deletions numba_rvsdg/core/datastructures/scfg.py
Original file line number Diff line number Diff line change
Expand Up @@ -259,7 +259,7 @@ def __iter__(self) -> Generator[Tuple[str, BasicBlock], None, None]:
yield (name, block)
# If this is a region, recursively yield everything from that
# specific region.
if type(block) == RegionBlock:
if type(block) == RegionBlock: # noqa: E721
assert block.subregion is not None
yield from block.subregion
# finally add any jump_targets to the list of names to visit
Expand Down Expand Up @@ -1372,7 +1372,7 @@ def region_view_iterator(
continue

# populate the to_vist
if type(block) == RegionBlock:
if type(block) == RegionBlock: # noqa: E721
# If this is a region, continue on to the exiting block, i.e.
# the region is presented a single fall-through block to the
# consumer of this iterator.
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8 changes: 5 additions & 3 deletions numba_rvsdg/core/transformations.py
Original file line number Diff line number Diff line change
Expand Up @@ -145,9 +145,11 @@ def reverse_lookup(d: Mapping[int, str], value: str) -> int:
)
variable_assignment[backedge_variable] = reverse_lookup(
backedge_value_table,
synth_exit
if needs_synth_exit
else next(iter(exit_blocks)),
(
synth_exit
if needs_synth_exit
else next(iter(exit_blocks))
),
)
# Create the actual control variable block
synth_assign_block = SyntheticAssignment(
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8 changes: 4 additions & 4 deletions numba_rvsdg/rendering/rendering.py
Original file line number Diff line number Diff line change
Expand Up @@ -66,15 +66,15 @@ def render_block(
The BasicBlock to be rendered.
"""
if type(block) == BasicBlock:
if type(block) == BasicBlock: # noqa: E721
self.render_basic_block(digraph, name, block)
if type(block) == PythonBytecodeBlock:
if type(block) == PythonBytecodeBlock: # noqa: E721
self.render_basic_block(digraph, name, block)
elif type(block) == SyntheticAssignment:
elif type(block) == SyntheticAssignment: # noqa: E721
self.render_control_variable_block(digraph, name, block)
elif isinstance(block, SyntheticBranch):
self.render_branching_block(digraph, name, block)
elif type(block) == RegionBlock:
elif type(block) == RegionBlock: # noqa: E721
self.render_region_block(digraph, name, block)
elif isinstance(block, SyntheticBlock):
self.render_basic_block(digraph, name, block)
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