Skip to content

Pull requests: o1-labs/proof-systems

New pull request New
61 Open 2,112 Closed
61 Open 2,112 Closed
Author
Filter by author
Loading
Label
Filter by label
Loading
Use alt + click/return to exclude labels
or ⇧ + click/return for logical OR
Projects
Filter by project
Loading
Milestones
Filter by milestone
Loading
Reviews
Filter by reviews
No reviews Review required Approved review Changes requested
Assignee
Filter by who’s assigned
Sort
Sort by
Newest Oldest Most commented Least commented Recently updated Least recently updated Best match
Most reactions
👍 👎 😄 🎉 😕 ❤️ 🚀 👀

Pull requests list

mvpoly: introduce optional param upper bound to compute nested loops
#2872 opened Dec 11, 2024 by dannywillems Loading…
4
MVPoly/PBT: remove a flaky test for multilinearity
#2871 opened Dec 11, 2024 by dannywillems Loading…
1
MVPoly/monomials: improve generation of random generation
#2870 opened Dec 11, 2024 by dannywillems Loading…
2
[20241209] Merge develop into master
#2868 opened Dec 9, 2024 by dannywillems Loading…
3
o1vm/riscv32im: start checking the nb of csts per instruction
#2864 opened Dec 4, 2024 by dannywillems • Draft
removing ignore pragma for successfully passing fibb 7 test
#2862 opened Dec 1, 2024 by svv232 Loading…
implementation for branch greater than equal unsigned
#2861 opened Dec 1, 2024 by svv232 Loading…
1
branch less than unsigned
#2860 opened Dec 1, 2024 by svv232 Loading…
1
implementation for branch greater than or equal
#2859 opened Dec 1, 2024 by svv232 Loading…
1
adding instruction for branch lt
#2858 opened Dec 1, 2024 by svv232 Loading…
2
branch equal instruction implementation
#2857 opened Dec 1, 2024 by svv232 Loading…
1
implementation for branch not equal instruction
#2856 opened Dec 1, 2024 by svv232 Loading…
1
fixing the parsing and constraint generation for sbtype instructions
#2855 opened Dec 1, 2024 by svv232 Loading…
2
o1vm/mips: use biguint instead of Fp in witness builder
#2854 opened Nov 25, 2024 by dannywillems • Draft
implementation for add upper immediate in riscv32im
#2853 opened Nov 25, 2024 by svv232 Loading…
1
implementation for load upper immediate in riscv32im
#2852 opened Nov 25, 2024 by svv232 Loading…
1
implementation for riscv32im store word
#2851 opened Nov 25, 2024 by svv232 Loading…
1
implementation for store half instruction in riscv32im
#2850 opened Nov 25, 2024 by svv232 Loading…
1
implementation for store byte instruction riscv32im
#2848 opened Nov 25, 2024 by svv232 Loading…
1
fix stype instruction parsing in riscv32im
#2847 opened Nov 25, 2024 by svv232 Loading…
1
implementation for less than immediate unsigned riscv32im
#2846 opened Nov 25, 2024 by svv232 Loading…
1
o1vm/riscv32im: test decoding remu
#2845 opened Nov 25, 2024 by dannywillems Loading…
1
implementation for set less than immediate
#2844 opened Nov 25, 2024 by svv232 Loading…
1
o1vm/riscv32im: test decoding rem
#2843 opened Nov 25, 2024 by dannywillems Loading…
1
o1vm/riscv32im: test decoding divu
#2842 opened Nov 25, 2024 by dannywillems Loading…
1
ProTip! Mix and match filters to narrow down what you’re looking for.