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[quidditch_snitch] Rename cluster_index to compute_core_index (#108)
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The op as it is currently used and specified returns the index of
compute cores (in our current simulations 0 to exclusive 8) and has
unspecified behavior on the DMA core. This will be used in a later PR to
properly lower it when doing DMA code specialization.
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zero9178 authored Aug 15, 2024
1 parent edaccab commit 60fa26e
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Showing 7 changed files with 26 additions and 18 deletions.
21 changes: 11 additions & 10 deletions codegen/compiler/src/Quidditch/Conversion/ConvertSnitchToLLVM.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -482,18 +482,19 @@ struct CallMicrokernelOpLowering : ConvertOpToLLVMPattern<CallMicrokernelOp> {
}
};

struct ClusterIndexOpLowering : ConvertOpToLLVMPattern<ClusterIndexOp> {
struct ComputeCoreIndexOpLowering : ConvertOpToLLVMPattern<ComputeCoreIndexOp> {

LLVM::LLVMFuncOp clusterIndexFunc;
LLVM::LLVMFuncOp computeCoreIndexFunc;

ClusterIndexOpLowering(LLVM::LLVMFuncOp clusterIndexFunc,
const LLVMTypeConverter &converter)
: ConvertOpToLLVMPattern(converter), clusterIndexFunc(clusterIndexFunc) {}
ComputeCoreIndexOpLowering(LLVM::LLVMFuncOp computeCoreIndexFunc,
const LLVMTypeConverter &converter)
: ConvertOpToLLVMPattern(converter),
computeCoreIndexFunc(computeCoreIndexFunc) {}

LogicalResult
matchAndRewrite(ClusterIndexOp op, OpAdaptor adaptor,
matchAndRewrite(ComputeCoreIndexOp op, OpAdaptor adaptor,
ConversionPatternRewriter &rewriter) const override {
rewriter.replaceOpWithNewOp<LLVM::CallOp>(op, clusterIndexFunc,
rewriter.replaceOpWithNewOp<LLVM::CallOp>(op, computeCoreIndexFunc,
ValueRange());
return success();
}
Expand Down Expand Up @@ -525,17 +526,17 @@ void quidditch::populateSnitchToLLVMConversionPatterns(
i32, ArrayRef<Type>{ptrType, ptrType, sizeT, sizeT, sizeT, sizeT}));
dmaStart2D->setAttr("hal.import.bitcode", builder.getUnitAttr());

auto clusterCoreIndex = builder.create<LLVM::LLVMFuncOp>(
auto computeCoreIndex = builder.create<LLVM::LLVMFuncOp>(
builder.getUnknownLoc(), "snrt_cluster_core_idx",
LLVM::LLVMFunctionType::get(i32, ArrayRef<Type>{}));
clusterCoreIndex->setAttr("hal.import.bitcode", builder.getUnitAttr());
computeCoreIndex->setAttr("hal.import.bitcode", builder.getUnitAttr());

patterns.insert<L1MemoryViewOpLowering, CompletedTokenOpLowering,
BarrierOpLowering, MicrokernelFenceOpLowering,
WaitForDMATransfersOpLowering>(typeConverter);
patterns.insert<StartDMATransferOp1DLowering>(dmaStart1D, typeConverter);
patterns.insert<StartDMATransferOp2DLowering>(dmaStart2D, typeConverter);
patterns.insert<ClusterIndexOpLowering>(clusterCoreIndex, typeConverter);
patterns.insert<ComputeCoreIndexOpLowering>(computeCoreIndex, typeConverter);
patterns.insert<CallMicrokernelOpLowering>(SymbolTable(moduleOp),
typeConverter);
}
Original file line number Diff line number Diff line change
Expand Up @@ -235,8 +235,15 @@ def QuidditchSnitch_BarrierOp : QuidditchSnitch_Op<"barrier"> {
}];
}

def QuidditchSnitch_ClusterIndexOp
: QuidditchSnitch_Op<"cluster_index", [Pure]> {
def QuidditchSnitch_ComputeCoreIndexOp
: QuidditchSnitch_Op<"compute_core_index", [Pure]> {

let description = [{
Returns the index of the compute core within a given cluster.
This is guaranteed to return a number between 0 and exclusive
`compute_cores` where `compute_cores` is an `IntegerAttr` in
the surrounding `ExecutableTargetAttr`.
}];

let results = (outs Index:$result);

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -44,7 +44,7 @@ void LowerForallOp::runOnOperation() {
forallOp.getTerminator().erase();

OpBuilder builder(forallOp);
Value id = builder.create<ClusterIndexOp>(forallOp.getLoc());
Value id = builder.create<ComputeCoreIndexOp>(forallOp.getLoc());

Value lb = forallOp.getLowerBound(builder).front();
Value ub = forallOp.getUpperBound(builder).front();
Expand Down
4 changes: 2 additions & 2 deletions codegen/compiler/src/Quidditch/Target/RemoveTrivialLoops.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -30,8 +30,8 @@ static std::optional<std::pair<AffineExpr, AffineExpr>>
getWorkgroupRange(Value processorValue,
std::optional<IntegerAttr> numComputeCores,
ArrayRef<int64_t> workgroupCount) {
if (auto idOp =
processorValue.getDefiningOp<quidditch::Snitch::ClusterIndexOp>()) {
if (auto idOp = processorValue
.getDefiningOp<quidditch::Snitch::ComputeCoreIndexOp>()) {
if (!numComputeCores)
return std::nullopt;

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,6 @@
// CHECK-LABEL: @test
func.func private @test() -> index {
// CHECK: call @snrt_cluster_core_idx()
%0 = quidditch_snitch.cluster_index
%0 = quidditch_snitch.compute_core_index
return %0 : index
}
2 changes: 1 addition & 1 deletion codegen/tests/Dialect/Snitch/Transforms/lower-forall.mlir
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ hal.executable @test {
// CHECK-SAME: %[[UB:[[:alnum:]]+]]
// CHECK-SAME: %[[STEP:[[:alnum:]]+]]
func.func @test(%lb : index, %ub : index, %step : index) {
// CHECK: %[[ID:.*]] = quidditch_snitch.cluster_index
// CHECK: %[[ID:.*]] = quidditch_snitch.compute_core_index
// CHECK: %[[NLB:.*]] = affine.apply #[[$MAP1]](%[[LB]], %[[ID]], %[[STEP]])
// CHECK: %[[NSTEP:.*]] = affine.apply #[[$MAP2]](%[[STEP]])
// CHECK: scf.for %[[IV:.*]] = %[[NLB]] to %[[UB]] step %[[NSTEP]]
Expand Down
2 changes: 1 addition & 1 deletion codegen/tests/Target/remove-trivial-loops.mlir
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ hal.executable @test {
builtin.module {
// CHECK-LABEL: func @test
func.func @test() {
%0 = quidditch_snitch.cluster_index
%0 = quidditch_snitch.compute_core_index
%1 = arith.constant 8 : index
// CHECK-NOT: scf.for
scf.for %arg3 = %0 to %1 step %1 {
Expand Down

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