Update core/cvxif_issue_register_commit_if_driver.sv

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core/cvxif_issue_register_commit_if_driver.sv

@@ -37,7 +37,7 @@ module cvxif_issue_register_commit_if_driver #(
     input logic [CVA6Cfg.TRANS_ID_BITS-1:0] x_trans_id_i,
     input [(CVA6Cfg.NrRgprPorts/CVA6Cfg.NrIssuePorts)-1:0][CVA6Cfg.XLEN-1:0] register_i,
     input logic [(CVA6Cfg.NrRgprPorts/CVA6Cfg.NrIssuePorts)-1:0] rs_valid_i
-    );
+);
   // X_ISSUE_REGISTER_SPLIT = 0 : Issue and register transactions are synchrone
   // Mandatory assignement
   assign register_valid_o  = issue_valid_o;