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Makefile : Add target to generate functional coverage using verdi tool #2755

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Jan 31, 2025
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3 changes: 3 additions & 0 deletions verif/sim/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -382,6 +382,9 @@ questa-uvm:
generate_cov_dash:
urg -warn none -hvp_proj cva6_embedded -format both -group instcov_for_score -hvp_attributes weight+description+Comment -dir vcs_results/default/vcs.d/simv.vdb -plan cva6.hvp -tgl portsonly

generate_verdi_cov:
-verdi -cov -format both -group instcov_for_score -covdir vcs_results/default/vcs.d/simv.vdb -plan cva6.hvp -tgl portsonly

vcs_clean_all:
@echo "[VCS] Cleanup (entire vcs_work dir)"
rm -rf $(CVA6_REPO_DIR)/verif/sim/vcs_results/ verdiLog/ simv* *.daidir *.vpd *.fsdb *.db csrc ucli.key vc_hdrs.h novas* inter.fsdb uart
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