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[XLA:CPU] Add support for riscv64 #32812
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Thanks for your pull request! It looks like this may be your first contribution to a Google open source project. Before we can look at your pull request, you'll need to sign a Contributor License Agreement (CLA). View this failed invocation of the CLA check for more information. For the most up to date status, view the checks section at the bottom of the pull request. |
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penpornk
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Thank you very much for the PR! Could you please help sign the Contributor License Agreement so we can proceed?
Here is how to sign:
https://github.com/openxla/xla/blob/main/docs/contributing.md#sign-the-contributor-license-agreement
Thanks, I've signed the CLA. Do I need to give the CI a kick? |
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Thank you! The CLA is picked up now. We'll proceed with the review soon. :) |
penpornk
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The overall XLA:CPU and build config changes look good to me. Also requesting review from @MichaelHudgins for packaging standpoint. I'll delay approving the PR until he approves to avoid triggering merge too soon.
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In general it looks fine to me, i will + in @rickeylev partially for the rules python patch here to see if he has any input |
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I have invoked the CI please see results and fix as needed. The CPU jobs are failing so this should be reproducible locally for you @infiWang |
Co-authored-by: Levi Zim <[email protected]>
Co-authored-by: Levi Zim <[email protected]>
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Fixed, should build now. @MichaelHudgins |
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LGTM
The patch is just bazel-contrib/rules_python#3350 from upstream.
penpornk
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Thank you both for reviewing!
Imported from GitHub PR tensorflow/tensorflow#102607 This commit fixes #102159 which prevented TensorFlow from compiling on RISC-V 64 due to missing codepath in the build system. RFC: Currently this patch overrides timeout of rules_python for all platforms which is obviously not ideal. How do we set pip package timeout here in Tensorflow? See also: - bazelbuild/bazel#25236 - bazelbuild/bazel#25699 - bazel-contrib/rules_python#3350 - #32812 - tensorflow/runtime#135 Copybara import of the project: -- 13b7db883e6ea0aa631490fb5f806c55ceea7cb5 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- a00c3a3ba94664798960cbc2fb0a6746fe0c3ac1 by gns <[email protected]>: Add missing llvm:: namespace qualifiers for DTensor Add the `llvm::` namespace prefix to `cast` and `isa` where it was missing in the DTensor MLIR code. -- febc5abc56ab302f5f39fe20176ed00c0c95cb7e by gns <[email protected]>: runtime: add missing stdint header Co-authored-by: Levi Zim <[email protected]> -- 6bf63fec56a6d961b06d932fe69b76eae89d8cb7 by gns <[email protected]>: Add riscv64 support patch for rules_python bazel-contrib/rules_python#3350 -- 68c44fa9613d5577f36c51a192c932795e13ed83 by gns <[email protected]>: tools: py: add riscv64 to pip and manylinux compilance test -- 3f2fe1e0256476449f64658219d997727c9cc534 by gns <[email protected]>: Lift timeout of rules_python for BFS wheels -- 252a9b7ad2336b7abbb94e269b4a976b45d5d6e7 by gns <[email protected]>: Revert llvm toolchain patch for riscv64 As already upstreamed. Co-authored-by: Levi Zim <[email protected]> -- 51047a86131e991ffea74fccb8f55e3521237a64 by gns <[email protected]>: Lift timeout for BFS wheels during pip init -- 3b8276420031969423c9a1f150341a0e41fa372e by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #102607 FUTURE_COPYBARA_INTEGRATE_REVIEW=tensorflow/tensorflow#102607 from infiWang:riscv64 3b8276420031969423c9a1f150341a0e41fa372e PiperOrigin-RevId: 825073762
Imported from GitHub PR tensorflow/tensorflow#102607 This commit fixes #102159 which prevented TensorFlow from compiling on RISC-V 64 due to missing codepath in the build system. RFC: Currently this patch overrides timeout of rules_python for all platforms which is obviously not ideal. How do we set pip package timeout here in Tensorflow? See also: - bazelbuild/bazel#25236 - bazelbuild/bazel#25699 - bazel-contrib/rules_python#3350 - #32812 - tensorflow/runtime#135 Copybara import of the project: -- 13b7db883e6ea0aa631490fb5f806c55ceea7cb5 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- a00c3a3ba94664798960cbc2fb0a6746fe0c3ac1 by gns <[email protected]>: Add missing llvm:: namespace qualifiers for DTensor Add the `llvm::` namespace prefix to `cast` and `isa` where it was missing in the DTensor MLIR code. -- febc5abc56ab302f5f39fe20176ed00c0c95cb7e by gns <[email protected]>: runtime: add missing stdint header Co-authored-by: Levi Zim <[email protected]> -- 6bf63fec56a6d961b06d932fe69b76eae89d8cb7 by gns <[email protected]>: Add riscv64 support patch for rules_python bazel-contrib/rules_python#3350 -- 68c44fa9613d5577f36c51a192c932795e13ed83 by gns <[email protected]>: tools: py: add riscv64 to pip and manylinux compilance test -- 3f2fe1e0256476449f64658219d997727c9cc534 by gns <[email protected]>: Lift timeout of rules_python for BFS wheels -- 252a9b7ad2336b7abbb94e269b4a976b45d5d6e7 by gns <[email protected]>: Revert llvm toolchain patch for riscv64 As already upstreamed. Co-authored-by: Levi Zim <[email protected]> -- 51047a86131e991ffea74fccb8f55e3521237a64 by gns <[email protected]>: Lift timeout for BFS wheels during pip init -- 3b8276420031969423c9a1f150341a0e41fa372e by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #102607 FUTURE_COPYBARA_INTEGRATE_REVIEW=tensorflow/tensorflow#102607 from infiWang:riscv64 3b8276420031969423c9a1f150341a0e41fa372e PiperOrigin-RevId: 825073762
Imported from GitHub PR tensorflow/tensorflow#102607 This commit fixes #102159 which prevented TensorFlow from compiling on RISC-V 64 due to missing codepath in the build system. RFC: Currently this patch overrides timeout of rules_python for all platforms which is obviously not ideal. How do we set pip package timeout here in Tensorflow? See also: - bazelbuild/bazel#25236 - bazelbuild/bazel#25699 - bazel-contrib/rules_python#3350 - #32812 - tensorflow/runtime#135 Copybara import of the project: -- 13b7db883e6ea0aa631490fb5f806c55ceea7cb5 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- a00c3a3ba94664798960cbc2fb0a6746fe0c3ac1 by gns <[email protected]>: Add missing llvm:: namespace qualifiers for DTensor Add the `llvm::` namespace prefix to `cast` and `isa` where it was missing in the DTensor MLIR code. -- febc5abc56ab302f5f39fe20176ed00c0c95cb7e by gns <[email protected]>: runtime: add missing stdint header Co-authored-by: Levi Zim <[email protected]> -- 6bf63fec56a6d961b06d932fe69b76eae89d8cb7 by gns <[email protected]>: Add riscv64 support patch for rules_python bazel-contrib/rules_python#3350 -- 68c44fa9613d5577f36c51a192c932795e13ed83 by gns <[email protected]>: tools: py: add riscv64 to pip and manylinux compilance test -- 3f2fe1e0256476449f64658219d997727c9cc534 by gns <[email protected]>: Lift timeout of rules_python for BFS wheels -- 252a9b7ad2336b7abbb94e269b4a976b45d5d6e7 by gns <[email protected]>: Revert llvm toolchain patch for riscv64 As already upstreamed. Co-authored-by: Levi Zim <[email protected]> -- 51047a86131e991ffea74fccb8f55e3521237a64 by gns <[email protected]>: Lift timeout for BFS wheels during pip init -- 3b8276420031969423c9a1f150341a0e41fa372e by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #102607 FUTURE_COPYBARA_INTEGRATE_REVIEW=tensorflow/tensorflow#102607 from infiWang:riscv64 3b8276420031969423c9a1f150341a0e41fa372e PiperOrigin-RevId: 825073762
Imported from GitHub PR tensorflow/tensorflow#102607 This commit fixes #102159 which prevented TensorFlow from compiling on RISC-V 64 due to missing codepath in the build system. RFC: Currently this patch overrides timeout of rules_python for all platforms which is obviously not ideal. How do we set pip package timeout here in Tensorflow? See also: - bazelbuild/bazel#25236 - bazelbuild/bazel#25699 - bazel-contrib/rules_python#3350 - #32812 - tensorflow/runtime#135 Copybara import of the project: -- 13b7db883e6ea0aa631490fb5f806c55ceea7cb5 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- a00c3a3ba94664798960cbc2fb0a6746fe0c3ac1 by gns <[email protected]>: Add missing llvm:: namespace qualifiers for DTensor Add the `llvm::` namespace prefix to `cast` and `isa` where it was missing in the DTensor MLIR code. -- febc5abc56ab302f5f39fe20176ed00c0c95cb7e by gns <[email protected]>: runtime: add missing stdint header Co-authored-by: Levi Zim <[email protected]> -- 6bf63fec56a6d961b06d932fe69b76eae89d8cb7 by gns <[email protected]>: Add riscv64 support patch for rules_python bazel-contrib/rules_python#3350 -- 68c44fa9613d5577f36c51a192c932795e13ed83 by gns <[email protected]>: tools: py: add riscv64 to pip and manylinux compilance test -- 3f2fe1e0256476449f64658219d997727c9cc534 by gns <[email protected]>: Lift timeout of rules_python for BFS wheels -- 252a9b7ad2336b7abbb94e269b4a976b45d5d6e7 by gns <[email protected]>: Revert llvm toolchain patch for riscv64 As already upstreamed. Co-authored-by: Levi Zim <[email protected]> -- 51047a86131e991ffea74fccb8f55e3521237a64 by gns <[email protected]>: Lift timeout for BFS wheels during pip init -- 3b8276420031969423c9a1f150341a0e41fa372e by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #102607 FUTURE_COPYBARA_INTEGRATE_REVIEW=tensorflow/tensorflow#102607 from infiWang:riscv64 3b8276420031969423c9a1f150341a0e41fa372e PiperOrigin-RevId: 825073762
Imported from GitHub PR tensorflow/tensorflow#102607 This commit fixes #102159 which prevented TensorFlow from compiling on RISC-V 64 due to missing codepath in the build system. RFC: Currently this patch overrides timeout of rules_python for all platforms which is obviously not ideal. How do we set pip package timeout here in Tensorflow? See also: - bazelbuild/bazel#25236 - bazelbuild/bazel#25699 - bazel-contrib/rules_python#3350 - #32812 - tensorflow/runtime#135 Copybara import of the project: -- 13b7db883e6ea0aa631490fb5f806c55ceea7cb5 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- a00c3a3ba94664798960cbc2fb0a6746fe0c3ac1 by gns <[email protected]>: Add missing llvm:: namespace qualifiers for DTensor Add the `llvm::` namespace prefix to `cast` and `isa` where it was missing in the DTensor MLIR code. -- febc5abc56ab302f5f39fe20176ed00c0c95cb7e by gns <[email protected]>: runtime: add missing stdint header Co-authored-by: Levi Zim <[email protected]> -- 6bf63fec56a6d961b06d932fe69b76eae89d8cb7 by gns <[email protected]>: Add riscv64 support patch for rules_python bazel-contrib/rules_python#3350 -- 68c44fa9613d5577f36c51a192c932795e13ed83 by gns <[email protected]>: tools: py: add riscv64 to pip and manylinux compilance test -- 3f2fe1e0256476449f64658219d997727c9cc534 by gns <[email protected]>: Lift timeout of rules_python for BFS wheels -- 252a9b7ad2336b7abbb94e269b4a976b45d5d6e7 by gns <[email protected]>: Revert llvm toolchain patch for riscv64 As already upstreamed. Co-authored-by: Levi Zim <[email protected]> -- 51047a86131e991ffea74fccb8f55e3521237a64 by gns <[email protected]>: Lift timeout for BFS wheels during pip init -- 3b8276420031969423c9a1f150341a0e41fa372e by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #102607 FUTURE_COPYBARA_INTEGRATE_REVIEW=tensorflow/tensorflow#102607 from infiWang:riscv64 3b8276420031969423c9a1f150341a0e41fa372e PiperOrigin-RevId: 825073762
Imported from GitHub PR #32812 Co-author: @kxxt 📝 Summary of Changes: This pull request adds support for RISC-V 64 architecture across the build system, code generation, and Python packaging infrastructure. 🎯 Justification: The changes ensure that riscv64 is recognized as a valid target in Bazel build configurations, LLVM toolchain selection, Python manylinux compliance checks, and related tests and patches. This allows the project to build and test components for riscv64 alongside other supported architectures. 🚀 Kind of Contribution: ✨ New Feature Copybara import of the project: -- 0d02393 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- 5d95fb4 by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #32812 FUTURE_COPYBARA_INTEGRATE_REVIEW=#32812 from infiWang:riscv64 5d95fb4 PiperOrigin-RevId: 826410020
Imported from GitHub PR openxla/xla#32812 Co-author: @kxxt 📝 Summary of Changes: This pull request adds support for RISC-V 64 architecture across the build system, code generation, and Python packaging infrastructure. 🎯 Justification: The changes ensure that riscv64 is recognized as a valid target in Bazel build configurations, LLVM toolchain selection, Python manylinux compliance checks, and related tests and patches. This allows the project to build and test components for riscv64 alongside other supported architectures. 🚀 Kind of Contribution: ✨ New Feature Copybara import of the project: -- 0d02393a6335fb43d67678d0cd15d671e77dc089 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- 5d95fb479e45524299ff4193b99bb4db0d74483b by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #32812 FUTURE_COPYBARA_INTEGRATE_REVIEW=openxla/xla#32812 from infiWang:riscv64 5d95fb479e45524299ff4193b99bb4db0d74483b PiperOrigin-RevId: 826410020
Imported from GitHub PR #32812 Co-author: @kxxt 📝 Summary of Changes: This pull request adds support for RISC-V 64 architecture across the build system, code generation, and Python packaging infrastructure. 🎯 Justification: The changes ensure that riscv64 is recognized as a valid target in Bazel build configurations, LLVM toolchain selection, Python manylinux compliance checks, and related tests and patches. This allows the project to build and test components for riscv64 alongside other supported architectures. 🚀 Kind of Contribution: ✨ New Feature Copybara import of the project: -- 0d02393 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- 5d95fb4 by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #32812 FUTURE_COPYBARA_INTEGRATE_REVIEW=#32812 from infiWang:riscv64 5d95fb4 PiperOrigin-RevId: 826410020
Imported from GitHub PR openxla/xla#32812 Co-author: @kxxt 📝 Summary of Changes: This pull request adds support for RISC-V 64 architecture across the build system, code generation, and Python packaging infrastructure. 🎯 Justification: The changes ensure that riscv64 is recognized as a valid target in Bazel build configurations, LLVM toolchain selection, Python manylinux compliance checks, and related tests and patches. This allows the project to build and test components for riscv64 alongside other supported architectures. 🚀 Kind of Contribution: ✨ New Feature Copybara import of the project: -- 0d02393a6335fb43d67678d0cd15d671e77dc089 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- 5d95fb479e45524299ff4193b99bb4db0d74483b by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #32812 FUTURE_COPYBARA_INTEGRATE_REVIEW=openxla/xla#32812 from infiWang:riscv64 5d95fb479e45524299ff4193b99bb4db0d74483b PiperOrigin-RevId: 826410020
Imported from GitHub PR #32812 Co-author: @kxxt 📝 Summary of Changes: This pull request adds support for RISC-V 64 architecture across the build system, code generation, and Python packaging infrastructure. 🎯 Justification: The changes ensure that riscv64 is recognized as a valid target in Bazel build configurations, LLVM toolchain selection, Python manylinux compliance checks, and related tests and patches. This allows the project to build and test components for riscv64 alongside other supported architectures. 🚀 Kind of Contribution: ✨ New Feature Copybara import of the project: -- 0d02393 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- 5d95fb4 by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #32812 FUTURE_COPYBARA_INTEGRATE_REVIEW=#32812 from infiWang:riscv64 5d95fb4 PiperOrigin-RevId: 826410020
Imported from GitHub PR openxla/xla#32812 Co-author: @kxxt 📝 Summary of Changes: This pull request adds support for RISC-V 64 architecture across the build system, code generation, and Python packaging infrastructure. 🎯 Justification: The changes ensure that riscv64 is recognized as a valid target in Bazel build configurations, LLVM toolchain selection, Python manylinux compliance checks, and related tests and patches. This allows the project to build and test components for riscv64 alongside other supported architectures. 🚀 Kind of Contribution: ✨ New Feature Copybara import of the project: -- 0d02393a6335fb43d67678d0cd15d671e77dc089 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- 5d95fb479e45524299ff4193b99bb4db0d74483b by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #32812 FUTURE_COPYBARA_INTEGRATE_REVIEW=openxla/xla#32812 from infiWang:riscv64 5d95fb479e45524299ff4193b99bb4db0d74483b PiperOrigin-RevId: 826410020
Imported from GitHub PR #32812 Co-author: @kxxt 📝 Summary of Changes: This pull request adds support for RISC-V 64 architecture across the build system, code generation, and Python packaging infrastructure. 🎯 Justification: The changes ensure that riscv64 is recognized as a valid target in Bazel build configurations, LLVM toolchain selection, Python manylinux compliance checks, and related tests and patches. This allows the project to build and test components for riscv64 alongside other supported architectures. 🚀 Kind of Contribution: ✨ New Feature Copybara import of the project: -- 0d02393 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- 5d95fb4 by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #32812 FUTURE_COPYBARA_INTEGRATE_REVIEW=#32812 from infiWang:riscv64 5d95fb4 PiperOrigin-RevId: 826410020
Imported from GitHub PR openxla/xla#32812 Co-author: @kxxt 📝 Summary of Changes: This pull request adds support for RISC-V 64 architecture across the build system, code generation, and Python packaging infrastructure. 🎯 Justification: The changes ensure that riscv64 is recognized as a valid target in Bazel build configurations, LLVM toolchain selection, Python manylinux compliance checks, and related tests and patches. This allows the project to build and test components for riscv64 alongside other supported architectures. 🚀 Kind of Contribution: ✨ New Feature Copybara import of the project: -- 0d02393a6335fb43d67678d0cd15d671e77dc089 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- 5d95fb479e45524299ff4193b99bb4db0d74483b by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #32812 FUTURE_COPYBARA_INTEGRATE_REVIEW=openxla/xla#32812 from infiWang:riscv64 5d95fb479e45524299ff4193b99bb4db0d74483b PiperOrigin-RevId: 826410020
Imported from GitHub PR tensorflow/tensorflow#102607 This commit fixes #102159 which prevented TensorFlow from compiling on RISC-V 64 due to missing codepath in the build system. RFC: Currently this patch overrides timeout of rules_python for all platforms which is obviously not ideal. How do we set pip package timeout here in Tensorflow? See also: - bazelbuild/bazel#25236 - bazelbuild/bazel#25699 - bazel-contrib/rules_python#3350 - #32812 - tensorflow/runtime#135 Copybara import of the project: -- 13b7db883e6ea0aa631490fb5f806c55ceea7cb5 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- a00c3a3ba94664798960cbc2fb0a6746fe0c3ac1 by gns <[email protected]>: Add missing llvm:: namespace qualifiers for DTensor Add the `llvm::` namespace prefix to `cast` and `isa` where it was missing in the DTensor MLIR code. -- febc5abc56ab302f5f39fe20176ed00c0c95cb7e by gns <[email protected]>: runtime: add missing stdint header Co-authored-by: Levi Zim <[email protected]> -- 6bf63fec56a6d961b06d932fe69b76eae89d8cb7 by gns <[email protected]>: Add riscv64 support patch for rules_python bazel-contrib/rules_python#3350 -- 68c44fa9613d5577f36c51a192c932795e13ed83 by gns <[email protected]>: tools: py: add riscv64 to pip and manylinux compilance test -- 3f2fe1e0256476449f64658219d997727c9cc534 by gns <[email protected]>: Lift timeout of rules_python for BFS wheels -- 252a9b7ad2336b7abbb94e269b4a976b45d5d6e7 by gns <[email protected]>: Revert llvm toolchain patch for riscv64 As already upstreamed. Co-authored-by: Levi Zim <[email protected]> -- 51047a86131e991ffea74fccb8f55e3521237a64 by gns <[email protected]>: Lift timeout for BFS wheels during pip init -- 3b8276420031969423c9a1f150341a0e41fa372e by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #102607 FUTURE_COPYBARA_INTEGRATE_REVIEW=tensorflow/tensorflow#102607 from infiWang:riscv64 3b8276420031969423c9a1f150341a0e41fa372e PiperOrigin-RevId: 825073762
Imported from GitHub PR #32812 Co-author: @kxxt 📝 Summary of Changes: This pull request adds support for RISC-V 64 architecture across the build system, code generation, and Python packaging infrastructure. 🎯 Justification: The changes ensure that riscv64 is recognized as a valid target in Bazel build configurations, LLVM toolchain selection, Python manylinux compliance checks, and related tests and patches. This allows the project to build and test components for riscv64 alongside other supported architectures. 🚀 Kind of Contribution: ✨ New Feature Copybara import of the project: -- 0d02393 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- 5d95fb4 by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #32812 FUTURE_COPYBARA_INTEGRATE_REVIEW=#32812 from infiWang:riscv64 5d95fb4 PiperOrigin-RevId: 826410020
Imported from GitHub PR openxla/xla#32812 Co-author: @kxxt 📝 Summary of Changes: This pull request adds support for RISC-V 64 architecture across the build system, code generation, and Python packaging infrastructure. 🎯 Justification: The changes ensure that riscv64 is recognized as a valid target in Bazel build configurations, LLVM toolchain selection, Python manylinux compliance checks, and related tests and patches. This allows the project to build and test components for riscv64 alongside other supported architectures. 🚀 Kind of Contribution: ✨ New Feature Copybara import of the project: -- 0d02393a6335fb43d67678d0cd15d671e77dc089 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- 5d95fb479e45524299ff4193b99bb4db0d74483b by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #32812 FUTURE_COPYBARA_INTEGRATE_REVIEW=openxla/xla#32812 from infiWang:riscv64 5d95fb479e45524299ff4193b99bb4db0d74483b PiperOrigin-RevId: 826410020
Imported from GitHub PR tensorflow/tensorflow#102607 This commit fixes #102159 which prevented TensorFlow from compiling on RISC-V 64 due to missing codepath in the build system. RFC: Currently this patch overrides timeout of rules_python for all platforms which is obviously not ideal. How do we set pip package timeout here in Tensorflow? See also: - bazelbuild/bazel#25236 - bazelbuild/bazel#25699 - bazel-contrib/rules_python#3350 - #32812 - tensorflow/runtime#135 Copybara import of the project: -- 13b7db883e6ea0aa631490fb5f806c55ceea7cb5 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- a00c3a3ba94664798960cbc2fb0a6746fe0c3ac1 by gns <[email protected]>: Add missing llvm:: namespace qualifiers for DTensor Add the `llvm::` namespace prefix to `cast` and `isa` where it was missing in the DTensor MLIR code. -- febc5abc56ab302f5f39fe20176ed00c0c95cb7e by gns <[email protected]>: runtime: add missing stdint header Co-authored-by: Levi Zim <[email protected]> -- 6bf63fec56a6d961b06d932fe69b76eae89d8cb7 by gns <[email protected]>: Add riscv64 support patch for rules_python bazel-contrib/rules_python#3350 -- 68c44fa9613d5577f36c51a192c932795e13ed83 by gns <[email protected]>: tools: py: add riscv64 to pip and manylinux compilance test -- 3f2fe1e0256476449f64658219d997727c9cc534 by gns <[email protected]>: Lift timeout of rules_python for BFS wheels -- 252a9b7ad2336b7abbb94e269b4a976b45d5d6e7 by gns <[email protected]>: Revert llvm toolchain patch for riscv64 As already upstreamed. Co-authored-by: Levi Zim <[email protected]> -- 51047a86131e991ffea74fccb8f55e3521237a64 by gns <[email protected]>: Lift timeout for BFS wheels during pip init -- 3b8276420031969423c9a1f150341a0e41fa372e by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #102607 FUTURE_COPYBARA_INTEGRATE_REVIEW=tensorflow/tensorflow#102607 from infiWang:riscv64 3b8276420031969423c9a1f150341a0e41fa372e PiperOrigin-RevId: 825073762
Imported from GitHub PR tensorflow/tensorflow#102607 This commit fixes #102159 which prevented TensorFlow from compiling on RISC-V 64 due to missing codepath in the build system. RFC: Currently this patch overrides timeout of rules_python for all platforms which is obviously not ideal. How do we set pip package timeout here in Tensorflow? See also: - bazelbuild/bazel#25236 - bazelbuild/bazel#25699 - bazel-contrib/rules_python#3350 - #32812 - tensorflow/runtime#135 Copybara import of the project: -- 13b7db883e6ea0aa631490fb5f806c55ceea7cb5 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- a00c3a3ba94664798960cbc2fb0a6746fe0c3ac1 by gns <[email protected]>: Add missing llvm:: namespace qualifiers for DTensor Add the `llvm::` namespace prefix to `cast` and `isa` where it was missing in the DTensor MLIR code. -- febc5abc56ab302f5f39fe20176ed00c0c95cb7e by gns <[email protected]>: runtime: add missing stdint header Co-authored-by: Levi Zim <[email protected]> -- 6bf63fec56a6d961b06d932fe69b76eae89d8cb7 by gns <[email protected]>: Add riscv64 support patch for rules_python bazel-contrib/rules_python#3350 -- 68c44fa9613d5577f36c51a192c932795e13ed83 by gns <[email protected]>: tools: py: add riscv64 to pip and manylinux compilance test -- 3f2fe1e0256476449f64658219d997727c9cc534 by gns <[email protected]>: Lift timeout of rules_python for BFS wheels -- 252a9b7ad2336b7abbb94e269b4a976b45d5d6e7 by gns <[email protected]>: Revert llvm toolchain patch for riscv64 As already upstreamed. Co-authored-by: Levi Zim <[email protected]> -- 51047a86131e991ffea74fccb8f55e3521237a64 by gns <[email protected]>: Lift timeout for BFS wheels during pip init -- 3b8276420031969423c9a1f150341a0e41fa372e by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #102607 FUTURE_COPYBARA_INTEGRATE_REVIEW=tensorflow/tensorflow#102607 from infiWang:riscv64 3b8276420031969423c9a1f150341a0e41fa372e PiperOrigin-RevId: 825073762
Imported from GitHub PR tensorflow/tensorflow#102607 This commit fixes #102159 which prevented TensorFlow from compiling on RISC-V 64 due to missing codepath in the build system. RFC: Currently this patch overrides timeout of rules_python for all platforms which is obviously not ideal. How do we set pip package timeout here in Tensorflow? See also: - bazelbuild/bazel#25236 - bazelbuild/bazel#25699 - bazel-contrib/rules_python#3350 - #32812 - tensorflow/runtime#135 Copybara import of the project: -- 13b7db883e6ea0aa631490fb5f806c55ceea7cb5 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- a00c3a3ba94664798960cbc2fb0a6746fe0c3ac1 by gns <[email protected]>: Add missing llvm:: namespace qualifiers for DTensor Add the `llvm::` namespace prefix to `cast` and `isa` where it was missing in the DTensor MLIR code. -- febc5abc56ab302f5f39fe20176ed00c0c95cb7e by gns <[email protected]>: runtime: add missing stdint header Co-authored-by: Levi Zim <[email protected]> -- 6bf63fec56a6d961b06d932fe69b76eae89d8cb7 by gns <[email protected]>: Add riscv64 support patch for rules_python bazel-contrib/rules_python#3350 -- 68c44fa9613d5577f36c51a192c932795e13ed83 by gns <[email protected]>: tools: py: add riscv64 to pip and manylinux compilance test -- 3f2fe1e0256476449f64658219d997727c9cc534 by gns <[email protected]>: Lift timeout of rules_python for BFS wheels -- 252a9b7ad2336b7abbb94e269b4a976b45d5d6e7 by gns <[email protected]>: Revert llvm toolchain patch for riscv64 As already upstreamed. Co-authored-by: Levi Zim <[email protected]> -- 51047a86131e991ffea74fccb8f55e3521237a64 by gns <[email protected]>: Lift timeout for BFS wheels during pip init -- 3b8276420031969423c9a1f150341a0e41fa372e by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #102607 FUTURE_COPYBARA_INTEGRATE_REVIEW=tensorflow/tensorflow#102607 from infiWang:riscv64 3b8276420031969423c9a1f150341a0e41fa372e PiperOrigin-RevId: 825073762
Imported from GitHub PR #32812 Co-author: @kxxt 📝 Summary of Changes: This pull request adds support for RISC-V 64 architecture across the build system, code generation, and Python packaging infrastructure. 🎯 Justification: The changes ensure that riscv64 is recognized as a valid target in Bazel build configurations, LLVM toolchain selection, Python manylinux compliance checks, and related tests and patches. This allows the project to build and test components for riscv64 alongside other supported architectures. 🚀 Kind of Contribution: ✨ New Feature Copybara import of the project: -- 0d02393 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- 5d95fb4 by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #32812 FUTURE_COPYBARA_INTEGRATE_REVIEW=#32812 from infiWang:riscv64 5d95fb4 PiperOrigin-RevId: 827890705
Imported from GitHub PR openxla/xla#32812 Co-author: @kxxt 📝 Summary of Changes: This pull request adds support for RISC-V 64 architecture across the build system, code generation, and Python packaging infrastructure. 🎯 Justification: The changes ensure that riscv64 is recognized as a valid target in Bazel build configurations, LLVM toolchain selection, Python manylinux compliance checks, and related tests and patches. This allows the project to build and test components for riscv64 alongside other supported architectures. 🚀 Kind of Contribution: ✨ New Feature Copybara import of the project: -- 0d02393a6335fb43d67678d0cd15d671e77dc089 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- 5d95fb479e45524299ff4193b99bb4db0d74483b by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #32812 FUTURE_COPYBARA_INTEGRATE_REVIEW=openxla/xla#32812 from infiWang:riscv64 5d95fb479e45524299ff4193b99bb4db0d74483b PiperOrigin-RevId: 827890705
Imported from GitHub PR #32812 Co-author: @kxxt 📝 Summary of Changes: This pull request adds support for RISC-V 64 architecture across the build system, code generation, and Python packaging infrastructure. 🎯 Justification: The changes ensure that riscv64 is recognized as a valid target in Bazel build configurations, LLVM toolchain selection, Python manylinux compliance checks, and related tests and patches. This allows the project to build and test components for riscv64 alongside other supported architectures. 🚀 Kind of Contribution: ✨ New Feature Copybara import of the project: -- 0d02393 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- 5d95fb4 by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #32812 FUTURE_COPYBARA_INTEGRATE_REVIEW=#32812 from infiWang:riscv64 5d95fb4 PiperOrigin-RevId: 827890705
Imported from GitHub PR openxla/xla#32812 Co-author: @kxxt 📝 Summary of Changes: This pull request adds support for RISC-V 64 architecture across the build system, code generation, and Python packaging infrastructure. 🎯 Justification: The changes ensure that riscv64 is recognized as a valid target in Bazel build configurations, LLVM toolchain selection, Python manylinux compliance checks, and related tests and patches. This allows the project to build and test components for riscv64 alongside other supported architectures. 🚀 Kind of Contribution: ✨ New Feature Copybara import of the project: -- 0d02393a6335fb43d67678d0cd15d671e77dc089 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- 5d95fb479e45524299ff4193b99bb4db0d74483b by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #32812 FUTURE_COPYBARA_INTEGRATE_REVIEW=openxla/xla#32812 from infiWang:riscv64 5d95fb479e45524299ff4193b99bb4db0d74483b PiperOrigin-RevId: 827890705
Imported from GitHub PR openxla/xla#32812 Co-author: @kxxt 📝 Summary of Changes: This pull request adds support for RISC-V 64 architecture across the build system, code generation, and Python packaging infrastructure. 🎯 Justification: The changes ensure that riscv64 is recognized as a valid target in Bazel build configurations, LLVM toolchain selection, Python manylinux compliance checks, and related tests and patches. This allows the project to build and test components for riscv64 alongside other supported architectures. 🚀 Kind of Contribution: ✨ New Feature Copybara import of the project: -- 0d02393a6335fb43d67678d0cd15d671e77dc089 by gns <[email protected]>: [XLA:CPU] Add support for riscv64 Co-authored-by: Levi Zim <[email protected]> -- 5d95fb479e45524299ff4193b99bb4db0d74483b by gns <[email protected]>: Refresh `rules_python` riscv64 patch Co-authored-by: Levi Zim <[email protected]> Merging this change closes #32812 PiperOrigin-RevId: 828379922
Co-author: @kxxt
📝 Summary of Changes:
This pull request adds support for RISC-V 64 architecture across the build system, code generation, and Python packaging infrastructure.
🎯 Justification:
The changes ensure that riscv64 is recognized as a valid target in Bazel build configurations, LLVM toolchain selection, Python manylinux compliance checks, and related tests and patches. This allows the project to build and test components for riscv64 alongside other supported architectures.
🚀 Kind of Contribution: ✨ New Feature