fix: CRC instruction operands

parsa-epfl · Sep 27, 2024 · 75ad6df · 75ad6df
1 parent 1d4aef7
commit 75ad6df
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Showing 3 changed files with 12 additions and 4 deletions.
diff --git a/components/Decoder/SemanticActions.hpp b/components/Decoder/SemanticActions.hpp
@@ -263,6 +263,7 @@ crcAction(SemanticInstruction* anInstruction,
           eOperandCode anInputCode,
           eOperandCode anInputCode2,
           eOperandCode anOutputCode,
+          std::vector<std::list<InternalDependance>>& rs_deps,
           bool is64);
 predicated_action
 countAction(SemanticInstruction* anInstruction,

diff --git a/components/Decoder/SemanticActions/ReverseAction.cpp b/components/Decoder/SemanticActions/ReverseAction.cpp
@@ -184,8 +184,9 @@ struct CRCAction : public PredicatedSemanticAction
               eOperandCode anInputCode2,
               eOperandCode anOutputCode,
               bool is64)
-      : PredicatedSemanticAction(anInstruction, 1, true)
+      : PredicatedSemanticAction(anInstruction, 2, true)
       , theInputCode(anInputCode)
+      , theInputCode2(anInputCode2)
       , theOutputCode(anOutputCode)
       , thePoly(aPoly)
       , the64(is64)
@@ -207,7 +208,7 @@ struct CRCAction : public PredicatedSemanticAction
 
         Operand in   = theInstruction->operand(theInputCode);
         Operand in2  = theInstruction->operand(theInputCode2);
-        uint32_t acc = (uint32_t)(boost::get<bits>(in));
+        uint32_t acc = uint32_t(boost::get<uint64_t>(in));
         // bits val = boost::get<bits> (in2);
 
         bits tempacc = (bits)((bitReverse(acc)) << (the64 ? 64 : 32));
@@ -228,7 +229,8 @@ struct CRCAction : public PredicatedSemanticAction
 
         data &= 0xffffffff;
 
-        theInstruction->setOperand(theOutputCode, data);
+        theInstruction->setOperand(theOutputCode, uint64_t(data));
+        satisfyDependants();
     }
 
     void describe(std::ostream& anOstream) const { anOstream << theInstruction->identify() << " CRCAction "; }
@@ -287,10 +289,15 @@ crcAction(SemanticInstruction* anInstruction,
           eOperandCode anInputCode,
           eOperandCode anInputCode2,
           eOperandCode anOutputCode,
+          std::vector<std::list<InternalDependance>>& rs_deps,
           bool is64)
 {
     CRCAction* act = new CRCAction(anInstruction, aPoly, anInputCode, anInputCode2, anOutputCode, is64);
     anInstruction->addNewComponent(act);
+    for (uint32_t i = 0; i < rs_deps.size(); ++i) {
+        rs_deps[i].push_back(act->dependance(i));
+    }
+
     return predicated_action(act, act->predicate());
 }
 

diff --git a/components/Decoder/encodings/DataProcReg.cpp b/components/Decoder/encodings/DataProcReg.cpp
@@ -190,7 +190,7 @@ CRC(archcode const& aFetchedOpcode, uint32_t aCPU, int64_t aSequenceNo)
     std::vector<std::list<InternalDependance>> rs_deps(2);
     uint32_t poly = crc32c ? 0x1EDC6F41 : 0x04C11DB7;
 
-    predicated_action act = crcAction(inst, poly, kOperand1, kOperand2, kResult, sf);
+    predicated_action act = crcAction(inst, poly, kOperand1, kOperand2, kResult, rs_deps, sf);
 
     readRegister(inst, 1, rn, rs_deps[0], false);
     readRegister(inst, 2, rm, rs_deps[1], sf);