wip: yl fix

parsa-epfl · Aug 30, 2024 · ceedc29 · ceedc29
1 parent 08a62a2
commit ceedc29
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Showing 10 changed files with 67 additions and 43 deletions.
diff --git a/components/Decoder/SemanticInstruction.cpp b/components/Decoder/SemanticInstruction.cpp
@@ -242,8 +242,12 @@ SemanticInstruction::postValidate()
         return false;
     }
 
-    if (thePrevalidationsPassed && theOverrideSimics && !theOverrideFns.empty() && !theRaisedException &&
-        !theAnnulled) {
+    if (thePrevalidationsPassed
+        && theOverrideSimics
+        && !theOverrideFns.empty()
+        && (theRaisedException != kException_None)
+        && !theAnnulled) {
+
         DBG_(VVerb, (<< *this << " overrideSimics flag set and override conditions passed."));
         while (!theOverrideFns.empty()) {
             theOverrideFns.front()();

diff --git a/components/Decoder/Validations.cpp b/components/Decoder/Validations.cpp
@@ -46,6 +46,7 @@
 #include "Validations.hpp"
 
 #include "components/uArch/uArchInterfaces.hpp"
+#include <components/uArch/ValueTracker.hpp>
 #include "core/qemu/api_wrappers.hpp"
 
 #define DBG_DeclareCategories Decoder
@@ -137,10 +138,17 @@ validateMemory::operator()()
     }
 
     if (flexus == qemu) return true;
+    // TODO: check
+    // mmio
+    if (theInstruction->getAccessAddress() < 0x40000000)
+        return true;
+
+    ValueTracker::valueTracker(0).invalidate(paddr, theSize);
+
     DBG_(Dev, Condition(flexus != qemu)(<< "flexus value: " << std::hex << flexus));
     DBG_(Dev, Condition(flexus != qemu)(<< "qemu value:   " << std::hex << qemu));
 
     return (flexus == qemu);
 }
 
-} // namespace nDecoder
+} // namespace nDecoder
diff --git a/components/DecoupledFeederQEMU/DecoupledFeederImpl.cpp b/components/DecoupledFeederQEMU/DecoupledFeederImpl.cpp
@@ -84,6 +84,7 @@ class FLEXUS_COMPONENT(DecoupledFeeder)
     {
         TranslationPtr tr(new Translation);
         tr->setData();
+        tr->theType     = (aMessage.type() == MemoryMessage::LoadReq) ? Translation::eLoad : Translation::eStore;
         tr->theVaddr    = aMessage.pc();
         tr->thePaddr    = aMessage.address();
         tr->inTraceMode = true;
@@ -120,6 +121,7 @@ class FLEXUS_COMPONENT(DecoupledFeeder)
 
         TranslationPtr tr(new Translation);
         tr->setInstr();
+        tr->theType     = Translation::eFetch;
         tr->theVaddr    = aMessage.pc();
         tr->thePaddr    = aMessage.address();
         tr->inTraceMode = true;
@@ -191,4 +193,4 @@ FLEXUS_PORT_ARRAY_WIDTH(DecoupledFeeder, ToMMU)
 #define FLEXUS_END_COMPONENT DecoupledFeeder
 
 #define DBG_Reset
-#include DBG_Control()
+#include DBG_Control()
diff --git a/components/FastCMPCache/FastCMPCacheImpl.cpp b/components/FastCMPCache/FastCMPCacheImpl.cpp
@@ -383,7 +383,6 @@ class FLEXUS_COMPONENT(FastCMPCache)
         // DBG_Assert(false, ( << "AHHH someone tried to send us a snoop message!
         // What were they thinking?!?" ));
         PhysicalMemoryAddress addr(aMessage.address() & theCoherenceUnitMask);
-        aMessage.fillLevel() = cfg.CacheLevel;
 
         performDelayedActions();
 
@@ -499,6 +498,7 @@ class FLEXUS_COMPONENT(FastCMPCache)
         int32_t extra_snoops_sent       = 0;
         bool accessed_memory            = false;
         PhysicalMemoryAddress addr(aMessage.address() & theCoherenceUnitMask);
+        aMessage.fillLevel() = cfg.CacheLevel;
 
         performDelayedActions();
 
@@ -899,4 +899,4 @@ FLEXUS_PORT_ARRAY_WIDTH(FastCMPCache, RegionNotifyOut)
 #define FLEXUS_END_COMPONENT FastCMPCache
 
 #define DBG_Reset
-#include DBG_Control()
+#include DBG_Control()
diff --git a/components/MemoryMap/MemoryMapImpl.cpp b/components/MemoryMap/MemoryMapImpl.cpp
@@ -98,10 +98,6 @@ struct MemoryMapImpl : public MemoryMap
 
     virtual void recordAccess(PhysicalMemoryAddress const& anAddress, AccessType aType)
     {
-#ifdef TRACK_ACCESSES
-        theRequestingComponent_isValid ? theMemoryMap.recordAccess(anAddress, aType, theRequestingComponent)
-                                       : theMemoryMap.recordAccess(anAddress, aType);
-#endif
     }
 };
 
@@ -418,4 +414,4 @@ FLEXUS_COMPONENT_INSTANTIATOR(MemoryMap, nMemoryMap);
 #define FLEXUS_END_COMPONENT MemoryMap
 
 #define DBG_Reset
-#include DBG_Control()
+#include DBG_Control()
diff --git a/components/MultiNic/MultiNicXImpl.hpp b/components/MultiNic/MultiNicXImpl.hpp
@@ -286,7 +286,7 @@ push(interface::FromNodeN const&, index_t aVC, MemoryTransport& transport)
 {
     // Ensure src port is set correctly.
     DBG_Assert(transport[NetworkMessageTag]->src_port == N);
-    DBG_Assert(static_cast<unsigned int>(transport[NetworkMessageTag]->vc) == aVC,
+    DBG_Assert(transport[NetworkMessageTag]->vc == (int)aVC,
                (<< "wrong VC: " << *(transport[NetworkMessageTag])));
 
     sendQueue[(N * cfg.VChannels) + aVC].push_back(transport);
@@ -296,4 +296,4 @@ push(interface::FromNodeN const&, index_t aVC, MemoryTransport& transport)
 #undef N
 #undef FromNodeN
 
-#endif // BOOST_PP_IS_ITERATING
+#endif // BOOST_PP_IS_ITERATING
diff --git a/components/NetShim/MemoryNetworkImpl.cpp b/components/NetShim/MemoryNetworkImpl.cpp
@@ -343,15 +343,15 @@ class FLEXUS_COMPONENT(MemoryNetwork)
 FLEXUS_COMPONENT_INSTANTIATOR(MemoryNetwork, nNetwork);
 FLEXUS_PORT_ARRAY_WIDTH(MemoryNetwork, ToNode)
 {
-    return cfg.VChannels * cfg.NumNodes;
+    return cfg.VChannels * (cfg.NumNodes ?: Flexus::Core::ComponentManager::getComponentManager().systemWidth());
 }
 FLEXUS_PORT_ARRAY_WIDTH(MemoryNetwork, FromNode)
 {
-    return cfg.VChannels * cfg.NumNodes;
+    return cfg.VChannels * (cfg.NumNodes ?: Flexus::Core::ComponentManager::getComponentManager().systemWidth());
 }
 
 #include FLEXUS_END_COMPONENT_IMPLEMENTATION()
 #define FLEXUS_END_COMPONENT MemoryNetwork
 
 #define DBG_Reset
-#include DBG_Control()
+#include DBG_Control()
diff --git a/components/uArch/ValueTracker.hpp b/components/uArch/ValueTracker.hpp
@@ -46,23 +46,22 @@
 #ifndef FLEXUS_UARCH_VALUETRACKER_HPP_INCLUDED
 #define FLEXUS_UARCH_VALUETRACKER_HPP_INCLUDED
 
+#include "components/uArch/uArchInterfaces.hpp"
 #include <core/boost_extensions/padded_string_cast.hpp>
 #include <core/debug/debug.hpp>
 #include <core/performance/profile.hpp>
 #include <core/qemu/configuration_api.hpp>
 #include <core/target.hpp>
 #include <core/types.hpp>
 #include <iostream>
+#include <unordered_map>
+#include <components/CommonQEMU/Slices/MemOp.hpp>
 
 namespace API = Flexus::Qemu::API;
-
-#include <components/CommonQEMU/Slices/MemOp.hpp>
-#include <core/qemu/api.h>
-#include <core/qemu/mai_api.hpp>
+using namespace Flexus::SharedTypes;
 
 #define DBG_DeclareCategories Special
 #include DBG_Control()
-using namespace Flexus::SharedTypes;
 
 namespace nuArch {
 
@@ -119,9 +118,10 @@ struct ValueTrack
                       << iter->second.theValue << std::dec << "<" << iter->second.theOutstandingStores << ">";
             ++iter;
         }
-        if (t.theSimicsReflectsCPU == kSimicsReflectsG) {
+
+        if (t.theSimicsReflectsCPU == (bits)(kSimicsReflectsG)) {
             anOstream << ". Simics Reflects: G";
-        } else if (t.theSimicsReflectsCPU == kPoisonedByDMA) {
+        } else if (t.theSimicsReflectsCPU == (bits)(kPoisonedByDMA)) {
             anOstream << ". Simics poisoned by DMA";
         } else {
             anOstream << ". Simics Reflects: " << t.theSimicsReflectsCPU;
@@ -200,7 +200,7 @@ struct ValueTracker
         return *theGlobalTracker[0];
     }
 
-    typedef std::map<PhysicalMemoryAddress, ValueTrack> tracker;
+    typedef std::unordered_map<uint64_t, ValueTrack> tracker;
     tracker theTracker;
     DMATracer theDMATracer;
 
@@ -310,7 +310,7 @@ struct ValueTracker
             DBG_(Iface, (<< "CPU[" << aCPU << "] Access.NothingOutstanding " << anAddress));
             return;
         } else {
-            if (iter->second.theSimicsReflectsCPU == kPoisonedByDMA) {
+            if (iter->second.theSimicsReflectsCPU == (bits)(kPoisonedByDMA)) {
                 // the globally visible value was updated by DMA, so update it just in
                 // case we use it later
                 Flexus::Qemu::Processor cpu          = Flexus::Qemu::Processor::getProcessor(aCPU);
@@ -322,7 +322,7 @@ struct ValueTracker
             }
             ValueTrack::local_values::iterator local = iter->second.theLocallyVisibleValues.find(aCPU);
             if (local != iter->second.theLocallyVisibleValues.end()) {
-                if (iter->second.theSimicsReflectsCPU == static_cast<int>(aCPU)) {
+                if (iter->second.theSimicsReflectsCPU == static_cast<bits>(aCPU)) {
                     // Simics currently has the value for this CPU.  We update the tracker
                     // with the new value
                     Flexus::Qemu::Processor cpu = Flexus::Qemu::Processor::getProcessor(aCPU);
@@ -360,7 +360,7 @@ struct ValueTracker
                 // No previous value for this CPU.  Start with the globally visible
                 // value
 
-                if (iter->second.theSimicsReflectsCPU == kSimicsReflectsG) {
+                if (iter->second.theSimicsReflectsCPU == (bits)(kSimicsReflectsG)) {
                     DBG_(Iface,
                          (<< "CPU[" << aCPU << "] Access.SimicsReflectsCorrectGlobal " << anAddress
                           << " Now: " << iter->second));
@@ -379,12 +379,16 @@ struct ValueTracker
     void store(uint32_t aCPU, PhysicalMemoryAddress anAddress, eSize aSize, bits aStoreValue)
     {
         FLEXUS_PROFILE();
-        DBG_Assert(anAddress != 0);
+        DBG_Assert(anAddress != kUnresolved);
         // DBG_Assert( anAddress < 0x40000000000LL );
         DBG_(Iface,
              (<< "CPU[" << aCPU << "] Store " << anAddress << "[" << aSize << "] = " << std::hex << aStoreValue
               << std::dec));
 
+        // mmio
+        if (anAddress < 0x40000000)
+          return;
+
         // Align the address
         PhysicalMemoryAddress aligned = dwAddr(anAddress);
 
@@ -409,7 +413,7 @@ struct ValueTracker
                   << " no prior outstanding values. Now: " << iter->second));
 
         } else {
-            if (iter->second.theSimicsReflectsCPU == kPoisonedByDMA) {
+            if (iter->second.theSimicsReflectsCPU == (bits)(kPoisonedByDMA)) {
                 // the globally visible value was updated by DMA, so update it just in
                 // case we use it later
                 Flexus::Qemu::Processor cpu          = Flexus::Qemu::Processor::getProcessor(aCPU);
@@ -422,7 +426,7 @@ struct ValueTracker
 
             ValueTrack::local_values::iterator local = iter->second.theLocallyVisibleValues.find(aCPU);
             if (local != iter->second.theLocallyVisibleValues.end()) {
-                if (iter->second.theSimicsReflectsCPU == static_cast<int>(aCPU)) {
+                if (iter->second.theSimicsReflectsCPU == static_cast<bits>(aCPU)) {
                     // Simics currently has the value for this CPU.  We update the tracker
                     // with the new value
                     Flexus::Qemu::Processor cpu = Flexus::Qemu::Processor::getProcessor(aCPU);
@@ -487,11 +491,15 @@ struct ValueTracker
     void commitStore(uint32_t aCPU, PhysicalMemoryAddress anAddress, eSize aSize, bits aStoreValue)
     {
         FLEXUS_PROFILE();
-        DBG_Assert(anAddress != 0);
+        DBG_Assert(anAddress != kUnresolved);
         DBG_Assert(anAddress < 0x40000000000LL);
         DBG_(Iface,
              (<< "CPU[" << aCPU << "] CommitStore " << anAddress << "[" << aSize << "] = " << std::hex << aStoreValue
               << std::dec));
+        //
+        // mmio
+        if (anAddress < 0x40000000)
+          return;
 
         Flexus::Qemu::Processor cpu = Flexus::Qemu::Processor::getProcessor(aCPU);
 
@@ -504,7 +512,7 @@ struct ValueTracker
         ValueTrack::local_values::iterator local = iter->second.theLocallyVisibleValues.find(aCPU);
         DBG_Assert(local != iter->second.theLocallyVisibleValues.end());
 
-        if (iter->second.theSimicsReflectsCPU == kPoisonedByDMA) {
+        if (iter->second.theSimicsReflectsCPU == (bits)(kPoisonedByDMA)) {
             // the globally visible value was updated by DMA, so update it just in
             // case we use it later
             iter->second.theGloballyVisibleValue = cpu.read_pa(aligned, 8);
@@ -558,7 +566,7 @@ struct ValueTracker
     bits load(uint32_t aCPU, PhysicalMemoryAddress anAddress, eSize aSize)
     {
         FLEXUS_PROFILE();
-        DBG_Assert(anAddress != 0);
+        DBG_Assert(anAddress != kUnresolved);
         DBG_Assert(aSize <= 16 && aSize >= 1);
         DBG_Assert(anAddress < 0x40000000000LL);
         DBG_(Iface, (<< "CPU[" << aCPU << "] Load " << anAddress << "[" << aSize << "]"));
@@ -571,14 +579,15 @@ struct ValueTracker
         // See if we already have a ValueTrack
         tracker::iterator iter = theTracker.find(aligned);
         if (iter == theTracker.end()) {
+        // for mmio loads, we can only assume that they are idempotent
             bits val = cpu.read_pa(anAddress, aSize);
             DBG_(Iface,
                  (<< "CPU[" << aCPU << "] Load.NoOutstandingValues " << anAddress << "[" << aSize << "] = " << std::hex
                   << val << std::dec));
             return val;
         }
 
-        if (iter->second.theSimicsReflectsCPU == kPoisonedByDMA) {
+        if (iter->second.theSimicsReflectsCPU == (bits)(kPoisonedByDMA)) {
             // the globally visible value was updated by DMA, so update it just in
             // case we use it later
             iter->second.theGloballyVisibleValue = cpu.read_pa(aligned, 8);
@@ -590,7 +599,7 @@ struct ValueTracker
 
         ValueTrack::local_values::iterator local = iter->second.theLocallyVisibleValues.find(aCPU);
         if (local == iter->second.theLocallyVisibleValues.end()) {
-            if (iter->second.theSimicsReflectsCPU != kSimicsReflectsG) {
+            if (iter->second.theSimicsReflectsCPU != (bits)(kSimicsReflectsG)) {
                 // Change simics to reflect the globally visible value
                 // cpu.writePAddr( aligned, 8, iter->second.theGloballyVisibleValue );
                 iter->second.theSimicsReflectsCPU = kSimicsReflectsG;
@@ -609,7 +618,7 @@ struct ValueTracker
             }
         }
 
-        if (iter->second.theSimicsReflectsCPU != static_cast<int>(aCPU)) {
+        if (iter->second.theSimicsReflectsCPU != static_cast<bits>(aCPU)) {
 
             // Change simics to reflect the value for this CPU
             // cpu.writePAddr( aligned, 8, local->second.theValue );
@@ -686,4 +695,4 @@ struct ValueTracker
 
 } // namespace nuArch
 
-#endif // FLEXUS_UARCH_VALUETRACKER_HPP_INCLUDED
+#endif // FLEXUS_UARCH_VALUETRACKER_HPP_INCLUDED
diff --git a/components/uArch/microArch.cpp b/components/uArch/microArch.cpp
@@ -292,12 +292,13 @@ class microArchImpl : public microArch
             // Record free ROB space for next cycle
             theAvailableROB = theCore->availableROB();
 
+            // TODO -
             eExceptionType interrupt = theCPU.has_irq() ? kException_IRQ : kException_None; // HEHE
             theCore->cycle(interrupt);
 
         } catch (ResynchronizeWithQemuException& e) {
             ++theResynchronizations;
-            if (theExceptionRaised) {
+            if (theExceptionRaised != (int)(kException_None)) {
                 // DBG_( Verb, ( << "CPU[" << std::setfill('0') << std::setw(2) <<
                 // theCPU.id() << "] Exception Raised: " <<
                 // Flexus::Qemu::API::SIM_get_exception_name(theCPU, theExceptionRaised)
@@ -329,7 +330,7 @@ class microArchImpl : public microArch
                          "=====\n"));
                 // theCPU.breakSimulation(); TODO
             }
-            theExceptionRaised = 0;
+            theExceptionRaised = kException_None;
         }
 
         CORE_DBG("--------------FINISH MICROARCH------------------------");
@@ -356,7 +357,7 @@ class microArchImpl : public microArch
         theCore->reset();
         theAvailableROB = theCore->availableROB();
 
-        if (theExceptionRaised) {
+        if (theExceptionRaised != (int)(kException_None)) {
             squash(kException);
         } else {
             squash(kResynchronize);
@@ -506,4 +507,4 @@ microArch::construct(uArchOptions_t options,
     return std::make_shared<microArchImpl>(options, squash, redirect, feedback, signalStoreForwardingHit, mmuResync);
 }
 
-} // namespace nuArchARM
+} // namespace nuArchARM
diff --git a/components/uArch/uArchImpl.cpp b/components/uArch/uArchImpl.cpp
@@ -287,7 +287,7 @@ class FLEXUS_COMPONENT(uArch)
         PhysicalMemoryAddress magicTranslation =
           Flexus::Qemu::Processor::getProcessor(theMicroArch->core()).translate_va2pa(aTranslate->theVaddr);
 
-        if (aTranslate->thePaddr == magicTranslation || magicTranslation == 0xffffffffffffffff) {
+        if (aTranslate->thePaddr == magicTranslation || magicTranslation == kUnresolved) {
             DBG_(Iface,
                  (<< "Magic QEMU translation == MMU Translation. Vaddr = " << std::hex << aTranslate->theVaddr
                   << ", PADDR_MMU = " << aTranslate->thePaddr << ", PADDR_QEMU = " << magicTranslation << std::dec
@@ -300,6 +300,10 @@ class FLEXUS_COMPONENT(uArch)
                             << ", PADDR_QEMU = " << magicTranslation << std::dec));
             }
         }
+        // respect qemu result as flexus does not have pmp
+        // TODO: but this should only happen for access faults
+        if (!aTranslate->isPagefault() && (magicTranslation == kUnresolved))
+        aTranslate->setPagefault();
 
         aTranslate->thePaddr = magicTranslation;
         theMicroArch->pushTranslation(aTranslate);
@@ -552,4 +556,4 @@ FLEXUS_COMPONENT_INSTANTIATOR(uArch, nuArch);
 #define FLEXUS_END_COMPONENT uArch
 
 #define DBG_Reset
-#include DBG_Control()
+#include DBG_Control()