chore: Add option to set TLB associativity and set

parsa-epfl · Jan 20, 2025 · 4c11865 · 4c11865
1 parent 8d4e84c
commit 4c11865
Showing 1 changed file with 8 additions and 4 deletions.
diff --git a/timing.cfg b/timing.cfg
@@ -169,7 +169,11 @@ flexus.set "-memory-map:write_page_map"                           "1" # "Write p
 flexus.set "-memory-map:page_map"                                 "0" # "Load Page Map on start" (ReadPageMap)
 
 # mmu: MMU
-flexus.set "-mmu:cores"                                        "1" # "Number of cores" (Cores)
-flexus.set "-mmu:itlbsize"                                     "64" # "Size of the Instruction TLB" (iTLBSize)
-flexus.set "-mmu:dtlbsize"                                     "64" # "Size of the Data TLB" (dTLBSize)
-flexus.set "-mmu:perfect"                                      "0" # "TLB never misses" (PerfectTLB) (1=true, 0=false)
+flexus.set "-mmu:cores"                                           "1" # "Number of cores" (Cores)
+flexus.set "-mmu:itlb_set"                                        "1" # "Set of the Instruction TLB"
+flexus.set "-mmu:itlb_assoc"                                     "64" # "Associativity of the Instruction TLB"
+flexus.set "-mmu:dtlb_set"                                        "1" # "Set of the Data TLB"
+flexus.set "-mmu:dtlb_assoc"                                     "64" # "Associativity of the Data TLB"
+flexus.set "-mmu:stlb_sete"                                    "2048" # Set of the Secondary TLB
+flexus.set "-mmu:stlb_assoc"                                      "4" # Associativity of the Secondary TLB 
+flexus.set "-mmu:perfect"                                         "0" # "TLB never misses" (PerfectTLB) (1=true, 0=false)