Linux Driver 2022.1.2 patch: VF 4K queue support for CPM5 provided RT…

…L support is available Linux Driver 2022.1.2 patch: VF 4K queue support for CPM5 provided RTL support is available
pbannister · Aug 18, 2024 · 734df55 · 734df55
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diff --git a/QDMA/linux-kernel/RELEASE b/QDMA/linux-kernel/RELEASE
@@ -1,5 +1,5 @@
-RELEASE: 2022.1 Patch 
-=====================
+RELEASE: 2022.1.2 Patch 
+=======================
 
 This release is validated for
 	- QDMA4.0 2020.1 Patch based example design
@@ -104,15 +104,19 @@ CPM5
 	- Debug register dump for ST and MM Errors
 	- Dual Instance support
 
-2022.1 Patch Updates
---------------------
+2022.1.1 Patch Updates
+----------------------
 - Ported changes from pull request https://github.com/Xilinx/dma_ip_drivers/pull/167 to fix XRT build issues while integrating qdma linux driver in to XRT stack
 
+2022.1.2 Patch Updates
+----------------------
+- Added VF 4K queues support for CPM5 design. This feature is applicable only when corresponding RTL support is added.
 
 KNOWN ISSUES:
 =============
 - CPM5 Only
-	- Sufficient host memory is required to accommodate 4K queues. Tested only upto 2099 queues with our test environment though driver supports 4K queues.
+	- Sufficient host memory is required to accommodate 4K queues. Tested only upto 2099 queues for PFs with our test environment though driver supports 4K queues.
+	- VF 4K queue support is not fully verified due to pdi issues
 
 - All Designs
 	- In interrupt mode, Sometimes completions are not received when C2H PIDX updates are held for 64 descriptors

diff --git a/QDMA/linux-kernel/docs/README b/QDMA/linux-kernel/docs/README
@@ -55,6 +55,14 @@ _____________________________________________________________________________
 	If only VF driver needs to be compiled:
   	[xilinx@]# make driver MODULE=mod_vf
 
+	Important Note for VF 4K queue support for CPM5 design only
+    -----------------------------------------------------------
+
+    To enable VF 4K queue driver support for CPM5 design, QDMA Linux driver need
+    to compile by enabling the EQDMA_CPM5_VF_GT_256Q_SUPPORTED macro
+
+    [xilinx@]# make EQDMA_CPM5_VF_GT_256Q_SUPPORTED=1
+
   1.2 Installing the compiled binaries:
   -------------------------------------
 

diff --git a/QDMA/linux-kernel/driver/Makefile b/QDMA/linux-kernel/driver/Makefile
@@ -120,6 +120,11 @@ ifeq ($(TANDEM_BOOT_SUPPORTED),1)
   export EXTRA_FLAGS
 endif
 
+ifeq ($(EQDMA_CPM5_VF_GT_256Q_SUPPORTED),1)
+  EXTRA_FLAGS += -DEQDMA_CPM5_VF_GT_256Q_SUPPORTED
+  export EXTRA_FLAGS
+endif
+
 # Don't allow ARCH to overwrite the modified variable when passed to
 # the sub-makes.
 MAKEOVERRIDES := $(filter-out ARCH=%,$(MAKEOVERRIDES))

diff --git a/QDMA/linux-kernel/driver/libqdma/qdma_access/eqdma_cpm5_access/eqdma_cpm5_access.c b/QDMA/linux-kernel/driver/libqdma/qdma_access/eqdma_cpm5_access/eqdma_cpm5_access.c
@@ -1446,6 +1446,15 @@ static struct eqdma_cpm5_hw_err_info
 		GLBL_ERR_STAT_ERR_H2C_MM_0_MASK,
 		&eqdma_cpm5_mm_h2c0_err_process
 	},
+	{
+		EQDMA_CPM5_MM_H2C0_RD_HDR_ADR_ERR,
+		"MM H2C0 Read cmpt hdr address mismatch Error",
+		EQDMA_CPM5_H2C_MM_ERR_CODE_ENABLE_MASK_ADDR,
+		EQDMA_CPM5_H2C_MM_STATUS_ADDR,
+		H2C_MM_ERR_CODE_ENABLE_RD_HDR_ADR_ERR_MASK,
+		GLBL_ERR_STAT_ERR_H2C_MM_0_MASK,
+		&eqdma_cpm5_mm_h2c0_err_process
+	},
 	{
 		EQDMA_CPM5_MM_H2C0_RD_FLR_ERR,
 		"MM H2C0 Read flr Error",

diff --git a/QDMA/linux-kernel/driver/libqdma/qdma_access/eqdma_cpm5_access/eqdma_cpm5_access.h b/QDMA/linux-kernel/driver/libqdma/qdma_access/eqdma_cpm5_access/eqdma_cpm5_access.h
@@ -217,11 +217,16 @@ struct eqdma_cpm5_hw_err_info {
 	void (*eqdma_cpm5_hw_err_process)(void *dev_hndl);
 };
 
-#define EQDMA_CPM5_OFFSET_VF_VERSION          0x5014
-#define EQDMA_CPM5_OFFSET_VF_USER_BAR         0x5018
+#ifdef EQDMA_CPM5_VF_GT_256Q_SUPPORTED
+#define EQDMA_CPM5_OFFSET_VF_VERSION          0x21014
+#define EQDMA_CPM5_OFFSET_MBOX_BASE_VF        0x21000
+#else
+#define EQDMA_CPM5_OFFSET_VF_VERSION           0x5014
+#define EQDMA_CPM5_OFFSET_MBOX_BASE_VF         0x5000
+#endif
 
 #define EQDMA_CPM5_OFFSET_MBOX_BASE_PF         0x42400
-#define EQDMA_CPM5_OFFSET_MBOX_BASE_VF         0x5000
+#define EQDMA_CPM5_OFFSET_VF_USER_BAR          0x5018
 
 #define EQDMA_CPM5_COMPL_CTXT_BADDR_HIGH_H_MASK         GENMASK_ULL(63, 38)
 #define EQDMA_CPM5_COMPL_CTXT_BADDR_HIGH_L_MASK         GENMASK_ULL(37, 6)

diff --git a/QDMA/linux-kernel/driver/libqdma/qdma_access/eqdma_soft_access/eqdma_soft_access.c b/QDMA/linux-kernel/driver/libqdma/qdma_access/eqdma_soft_access/eqdma_soft_access.c
@@ -1442,6 +1442,15 @@ static struct eqdma_hw_err_info eqdma_err_info[EQDMA_ERRS_ALL] = {
 		GLBL_ERR_STAT_ERR_H2C_MM_0_MASK,
 		&eqdma_mm_h2c0_err_process
 	},
+	{
+		EQDMA_MM_H2C0_RD_HDR_ADR_ERR,
+		"MM H2C0 Read cmpt hdr address mismatch Error",
+		EQDMA_H2C_MM_ERR_CODE_ENABLE_MASK_ADDR,
+		EQDMA_H2C_MM_STATUS_ADDR,
+		H2C_MM_ERR_CODE_ENABLE_RD_HDR_ADR_ERR_MASK,
+		GLBL_ERR_STAT_ERR_H2C_MM_0_MASK,
+		&eqdma_mm_h2c0_err_process
+	},
 	{
 		EQDMA_MM_H2C0_RD_FLR_ERR,
 		"MM H2C0 Read flr Error",

diff --git a/QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_access_common.c b/QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_access_common.c
@@ -36,7 +36,8 @@
  */
 enum qdma_ip {
 	QDMA_OR_VERSAL_IP,
-	EQDMA_IP
+	EQDMA_IP,
+	EQDMA_CPM5_IP
 };
 
 
@@ -559,8 +560,14 @@ static int qdma_is_config_bar(void *dev_hndl, uint8_t is_vf, enum qdma_ip *ip)
 		if (FIELD_GET(QDMA_GLBL2_VF_UNIQUE_ID_MASK, reg_val)
 				!= QDMA_MAGIC_NUMBER) {
 			/* Its either QDMA or Versal */
+
+#ifdef EQDMA_CPM5_VF_GT_256Q_SUPPORTED
+			*ip = EQDMA_CPM5_IP;
+			reg_addr = EQDMA_CPM5_OFFSET_VF_VERSION;
+#else
 			*ip = EQDMA_IP;
 			reg_addr = EQDMA_OFFSET_VF_VERSION;
+#endif
 			reg_val = qdma_reg_read(dev_hndl, reg_addr);
 		} else {
 			*ip = QDMA_OR_VERSAL_IP;
@@ -1266,8 +1273,11 @@ int qdma_hw_access_init(void *dev_hndl, uint8_t is_vf,
 
 	if (ip == EQDMA_IP)
 		hw_access->qdma_get_version = &eqdma_get_version;
+	else if (ip == EQDMA_CPM5_IP)
+		hw_access->qdma_get_version = &eqdma_cpm5_get_version;
 	else
 		hw_access->qdma_get_version = &qdma_get_version;
+
 	hw_access->qdma_init_ctxt_memory = &qdma_init_ctxt_memory;
 	hw_access->qdma_fmap_conf = &qdma_fmap_conf;
 	hw_access->qdma_sw_ctx_conf = &qdma_sw_ctx_conf;

diff --git a/QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_access_version.h b/QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_access_version.h
@@ -20,7 +20,7 @@
 
 #define QDMA_VERSION_MAJOR	2022
 #define QDMA_VERSION_MINOR	1
-#define QDMA_VERSION_PATCH	1
+#define QDMA_VERSION_PATCH	2
 
 #define QDMA_VERSION_STR	\
 	__stringify(QDMA_VERSION_MAJOR) "." \

diff --git a/QDMA/linux-kernel/driver/libqdma/version.h b/QDMA/linux-kernel/driver/libqdma/version.h
@@ -25,7 +25,7 @@
 
 #define LIBQDMA_VERSION_MAJOR	2022
 #define LIBQDMA_VERSION_MINOR	1
-#define LIBQDMA_VERSION_PATCH	1
+#define LIBQDMA_VERSION_PATCH	2
 
 #define LIBQDMA_VERSION_STR	\
 	__stringify(LIBQDMA_VERSION_MAJOR) "." \

diff --git a/QDMA/linux-kernel/driver/src/version.h b/QDMA/linux-kernel/driver/src/version.h
@@ -33,7 +33,7 @@
 
 #define DRV_MOD_MAJOR		2022
 #define DRV_MOD_MINOR		1
-#define DRV_MOD_PATCHLEVEL	1
+#define DRV_MOD_PATCHLEVEL	2
 
 #define DRV_MODULE_VERSION      \
 	__stringify(DRV_MOD_MAJOR) "." \