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board: sama5: Fix failure to amend VDDANA
Fix the failure to amend the VDDANA OUT voltage. When amending the voltage of OUT2 to 1.25v, the TWI will return "timeout to wait RXRDY bit"(its value was updated in fact.) In case return after asserting the error, the subsequent OUT voltage will not be amended. Even if the error from one OUT setting operation, it should not affect other, their voltage will continue to be amended. Adjust the sequence, alway put the OUT2 to last one to operate. Signed-off-by: Wenyou Yang <[email protected]>
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