Labor Files for CAr Laboratories practical sessions Moodle Cyberlearn.
Description • How To Use • Launch • Credits • License • Find us on
The documentation is available under the car-docs Git repository.
As it changes each year, all you have to do is search on Moodle Cyberlearn for the course and select the one starting with the last two digits of the current year.
Course number:
- YY_HES-SO-VS_Architecture des ordinateurs / Computerarchitektur
The HEIRV32-MC (MC standing for Multi Cycle) lab intends to recreate the previsouly seen HEIRV32-SC architecture while cutting the system into the five steps of the RISC-V pipeline.
It does not meet the minimum requirements for the RV32I ISA, but is simpler to implement and support the following instructions :
- R-type (op rd rs1 rs2)
- add : rd = rs1 + rs2
- sub : rd = rs1 - rs2
- slt : rd = (rs1 < rs2) ? 1:0
- or : rd = rs1 | rs2
- and : rd = rs1 & rs2
- (opt) I-type (op rd rs1 imm), imm on 12 bits
- addi : rd = rs1 + imm
- slti : rd = (rs1 < imm) ? 1:0
- ori : rd = rs1 | imm
- andi : rd = rs1 & imm
- lw (op dest imm(rs1)) : dest = Memory[rs1 + imm]
- S-type (op rs2 offs(rs1)), offs on 12 bits
- sw : Memory[rs1 + offs] = rs2
- B-type (op rs1 rs2 imm]), imm given on 12 bits that will be << 1
- beq : if(rs1 == rs2) -> PC += imm
- (opt) J-type (op imm || op rd imm), imm given on 20 bits that will be << 1
- jal : rd = PC + 4 (if no rd specified, rd = x1); PC += imm
Code can be written for it through its dedicated assembler (see inside the heivr32-asm folder).
To clone this template, you'll need Git. You can also opt for the archive version. HDL Designer, Modelsim and ISE 14.7 must be installed on your computer. See the wiki for help.
The use of the assembler is explained inside the heirv32-asm folder.
Finally, the doc can be found inside the doc folder.
# Clone this repository including submodules
git clone <repo_url>
# Go into the repository
cd car-labs
# Run the app
## Linux
./car-labs.bash
## Windows
.\car-labs.bat
- COF
- PRC
- ZAS
- AMA
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