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This change splits 10xx into 106x (copy) and extracts 105x. Modules such as otp.c, console.c, timer.c and others come from the common 10xx implementation, config.h, init.S and imxrt.[ch] hal are dedicated separately for 105x and 106x. The linker script for rt105x target have been adapted to the FlexRAM configuration as follows: ITCM = 160 KiB, DTCM = 288 KiB, OCRAM = 64 KiB, and FLASH = 8 MiB. Because it carries code that was already implemented, it does not introduce fixes related to MISRA JIRA: RTOS-575
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/* | ||
* Phoenix-RTOS | ||
* | ||
* Operating system loader | ||
* | ||
* i.MX RT106x USB physical layer controller | ||
* | ||
* Copyright 2021 Phoenix Systems | ||
* Author: Hubert Buczynski | ||
* | ||
* This file is part of Phoenix-RTOS. | ||
* | ||
* %LICENSE% | ||
*/ | ||
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#include "client.h" | ||
#include "usbphy.h" | ||
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/* clang-format off */ | ||
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enum { | ||
/* Power-Down Register */ | ||
usbphy_pwd, usbphy_pwd_set, usbphy_pwd_clr, usbphy_pwd_tog, | ||
/* Transmitter & Receiver Control Registers */ | ||
usbphy_tx, usbphy_tx_set, usbphy_tx_clr, usbphy_tx_tog, | ||
usbphy_rx, usbphy_rx_set, usbphy_rx_clr, usbphy_rx_tog, | ||
/* General Control Register */ | ||
usbphy_ctrl, usbphy_ctrl_set, usbphy_ctrl_clr, usbphy_ctrl_tog, | ||
/* USB Status & Debug Registers */ | ||
usbphy_status, | ||
usbphy_debug = 20, usbphy_debug_set, usbphy_debug_clr, usbphy_debug_tog, | ||
/* UTMI Status & Debug Registers */ | ||
usbphy_debug0_status, usbphy_debug1 = 28, | ||
usbphy_debug1_set, usbphy_debug1_clr, usbphy_debug1_tog, | ||
/* UTMI RTL */ | ||
usbphy_version | ||
}; | ||
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/* clang-format on */ | ||
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struct { | ||
u8 pool[USB_POOL_SIZE] __attribute__((aligned(USB_BUFFER_SIZE))); | ||
size_t usedPools; | ||
} phyusb_common; | ||
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void *usbclient_allocBuff(u32 size) | ||
{ | ||
size_t org = USB_BUFFER_SIZE * phyusb_common.usedPools; | ||
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if ((size % USB_BUFFER_SIZE) != 0 || org + size > USB_POOL_SIZE) | ||
return NULL; | ||
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phyusb_common.usedPools += size / USB_BUFFER_SIZE; | ||
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return &phyusb_common.pool[org]; | ||
} | ||
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void usbclient_buffReset(void) | ||
{ | ||
phyusb_common.usedPools = 0; | ||
} | ||
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void *phy_getBase(void) | ||
{ | ||
return USB0_BASE_ADDR; | ||
} | ||
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u32 phy_getIrq(void) | ||
{ | ||
return USB0_IRQ; | ||
} | ||
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static void phy_setClock(void) | ||
{ | ||
_imxrt_setDevClock(pctl_clk_iomuxc, clk_state_run_wait); | ||
_imxrt_setDevClock(pctl_clk_usboh3, clk_state_run_wait); | ||
} | ||
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static void phy_initPad(void) | ||
{ | ||
/* USB_OTG1_ID is an instance of anatop */ | ||
_imxrt_setIOisel(pctl_isel_anatop_usb_otg1_id, 0); | ||
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/* GPIO_AD_B0_01 is configured as USB_OTG1_ID (input) ALT3 */ | ||
_imxrt_setIOmux(pctl_mux_gpio_ad_b0_01, 0, 3); | ||
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/* IOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_01 = 0x10b0 */ | ||
_imxrt_setIOpad(pctl_mux_gpio_ad_b0_01, 0, 0, 0, 1, 0, 2, 6, 0); | ||
} | ||
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void phy_reset(void) | ||
{ | ||
volatile u32 *usbphy = (u32 *)USB0_PHY_BASE_ADDR; | ||
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/* Reset PHY */ | ||
*(usbphy + usbphy_ctrl_set) = (1 << 31); | ||
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/* Enable clock and release the PHY from reset */ | ||
*(usbphy + usbphy_ctrl_clr) = (1 << 31) | (1 << 30); | ||
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/* Power up the PHY */ | ||
*(usbphy + usbphy_pwd) = 0; | ||
} | ||
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void phy_init(void) | ||
{ | ||
phyusb_common.usedPools = 0; | ||
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phy_setClock(); | ||
phy_initPad(); | ||
phy_reset(); | ||
} |
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# | ||
# Makefile for Phoenix-RTOS loader (ARMv7M HAL imxrt105x) | ||
# | ||
# Copyright 2021 Phoenix Systems | ||
# | ||
# %LICENSE% | ||
# | ||
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LDFLAGS:=$(filter-out -Tbss% , $(LDFLAGS)) | ||
LDFLAGS:=$(filter-out -Tdata% , $(LDFLAGS)) | ||
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CFLAGS:=$(filter-out -mfloat-abi% , $(CFLAGS)) | ||
CFLAGS+= -mfloat-abi=soft | ||
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GCCLIB := $(shell $(CC) $(CFLAGS) -print-libgcc-file-name) | ||
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PLO_COMMANDS = alias app call console copy dump echo erase go help kernel kernelimg map \ | ||
mem mpu otp phfs reboot script wait | ||
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include devices/usbc-cdc/Makefile | ||
include devices/uart-imxrt106x/Makefile | ||
include devices/flash-flexspi/Makefile | ||
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OBJS += $(addprefix $(PREFIX_O)hal/$(TARGET_SUFF)/imxrt/10xx/105x/, _init.o imxrt.o) |
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