Merge branch 'master' into new-page

src/docs/knowledge-base/cmsis-packs.md

@@ -105,7 +105,7 @@ flash_algorithms:
       program_page_timeout: number
       # How long a sector erase procedure can take.
       erase_sector_timeout: number
-      # The sectors this piece of flash consists of. A sector is the eraseable unit.
+      # The sectors this piece of flash consists of. A sector is the erasable unit.
       sectors:
         # The size of the sectors starting form the address below.
         - size: number

src/docs/knowledge-base/troubleshooting.md

@@ -15,7 +15,7 @@ More info on DEFMT filtering levels [here](https://defmt.ferrous-systems.com/fil
 This can be set multiple ways:
 - If using `cargo run` on a probe-rs based runner:
   - `ENV VAR` at build time: `DEFMT_LOG=trace cargo build ...`
-  - In `.cargo/config.toml` **Note:** there is a bug in cargo that does not automatically recognise changes when rebuilding.
+  - In `.cargo/config.toml` **Note:** there is a bug in cargo that does not automatically recognize changes when rebuilding.
     ```toml
     [env]
     DEFMT_LOG = "trace"
@@ -54,7 +54,7 @@ This can be set multiple ways:
     ``` toml
     runner = "probe-rs-cli run --chip STM32L451RCTx"
     ```
-- If using VSCode plugin in `launch.json` confgurations/chip
+- If using VSCode plugin in `launch.json` configurations/chip
     ```json
     "configurations": [{
         // SNIP...
@@ -76,4 +76,4 @@ use defmt_rtt as _;
 
 **Make sure tooling is up to date:**
 
-As with any set of tools being activly developed and improved, sometimes if one part is updated and there is a breaking change, the other tools must be updated as well in order to function.
+As with any set of tools being actively developed and improved, sometimes if one part is updated and there is a breaking change, the other tools must be updated as well in order to function.

src/docs/library/basics.md

@@ -38,7 +38,7 @@ let session = probes[0].attach("nRF52")?;
 ```
 
 Now we have got our [Session](https://docs.rs/probe-rs/*/probe_rs/struct.Session.html) ready to conduct further business.
-Take a closer look at the [::attach()](https://docs.rs/probe-rs/*/probe_rs/struct.Probe.html#method.attach) call. Appart from passing a chip name, you can also pass various other arguments for selecting the chip.
+Take a closer look at the [::attach()](https://docs.rs/probe-rs/*/probe_rs/struct.Probe.html#method.attach) call. Apart from passing a chip name, you can also pass various other arguments for selecting the chip.
 
 ## The Session struct
 
@@ -62,7 +62,7 @@ The [Core](https://docs.rs/probe-rs/*/probe_rs/struct.Core.html) is probably the
 With the core struct you can manipulate the CPU and it's accessible memories.
 
 In the previous sections we have learned how we attach to a core. 
-Someties you want to access the core operations in quick fashion. 
+Sometimes you want to access the core operations in quick fashion. 
 This is what [Session::auto_attach()](https://docs.rs/probe-rs/*/probe_rs/struct.Session.html#method.auto_attach) is for. 
 It lets you attach to the Core without first opening a Probe. 
 It will try to open a connected prbe, and select the Core as best as it can
@@ -128,7 +128,7 @@ core.set_hw_breakpoint(address)?;
 core.clear_hw_breakpoint(address)?;
 ```
 
-Of course manipulating the CPU alone is not enough. Therefore it's also possible to access the memories that are phyiscally accessible by the CPU.
+Of course manipulating the CPU alone is not enough. Therefore it's also possible to access the memories that are physically accessible by the CPU.
 
 ```rs
 // We can read a single word for the convenience of reading registers.

src/docs/library/crosscompiling.md

@@ -71,4 +71,4 @@ You now have a statically built `cargo-flash` binary inside the `target/<archite
 
 ## Using LLVM
 
-As using `LLVM` for cosscompiling can go out of the scope of just generating a `cargo-flash` binary, please follow the instructions on how to crosscompile in the **LLVM** [guide](https://www.llvm.org/docs/HowToCrossCompileLLVM.html).
+As using `LLVM` for crosscompiling can go out of the scope of just generating a `cargo-flash` binary, please follow the instructions on how to crosscompile in the **LLVM** [guide](https://www.llvm.org/docs/HowToCrossCompileLLVM.html).

src/docs/library/quickstart.md

@@ -33,7 +33,7 @@ Want to do
 * automatic WCET analysis?
 * automatic firmware downloads in your project?
 
-**probe-rs** was designed with such usecases in mind.
+**probe-rs** was designed with such use-cases in mind.
 
 Read more about [the structure](/guide/basics#structure).
 

src/docs/tools/cargo-flash.md

@@ -27,7 +27,7 @@ cargo flash --release --chip <chip_name>
 
 # Don't know if your target is supported
 # by cargo flash and what it's name is?
-cargo flash --list-chips
+probe-rs chip list
 
 # You can run your examples as usual with
 cargo flash --example <your_example>

src/docs/tools/vscode.md

@@ -603,9 +603,9 @@ for more details.
                         "type": "string",
                         "description": "The path (relative to `cwd` or absolute) to the ESP-IDF bootloader."
                     },
-                    "idf_partion_table": {
+                    "idf_partition_table": {
                         "type": "string",
-                        "description": "The path (relative to `cwd` or absolute) to the ESP-IDF partion table."
+                        "description": "The path (relative to `cwd` or absolute) to the ESP-IDF partition table."
                     }
                 }
             }
@@ -688,7 +688,7 @@ for more details.
   "properties": {
       "server": {
           "type": "string",
-          "description": "Optionally onnect to an existing `probe-rs-debugger` session on IP and Port, e.g. '127.0.0.1:50000'",
+          "description": "Optionally connect to an existing `probe-rs-debugger` session on IP and Port, e.g. '127.0.0.1:50000'",
           "default": "127.0.0.1:50000"
       },
       "consoleLogLevel": {

src/static/files/69-probe-rs.rules

@@ -5,7 +5,7 @@
 # This rules are based on the udev rules from the OpenOCD project, with unsupported probes removed.
 # See http://openocd.org/ for more details.
 #
-# This file is available under the GNU General Public License v2.0 
+# This file is available under the GNU General Public License v2.0
 
 ACTION!="add|change", GOTO="probe_rs_rules_end"
 
@@ -120,7 +120,8 @@ ATTRS{idVendor}=="1366", ATTRS{idProduct}=="106d", MODE="660", GROUP="plugdev",
 ATTRS{idVendor}=="1366", ATTRS{idProduct}=="106e", MODE="660", GROUP="plugdev", TAG+="uaccess"
 ATTRS{idVendor}=="1366", ATTRS{idProduct}=="106f", MODE="660", GROUP="plugdev", TAG+="uaccess"
 
-
+# Espressif dev kit FTDI
+ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6010", MODE="660", GROUP="plugdev", TAG+="uaccess"
 # Espressif USB JTAG/serial debug unit
 ATTRS{idVendor}=="303a", ATTRS{idProduct}=="1001", MODE="660", GROUP="plugdev", TAG+="uaccess"
 # Espressif USB Bridge