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Upgrade to release tag: intel-media-23.3.5 #64

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3 changes: 1 addition & 2 deletions CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@

cmake_minimum_required(VERSION 3.5)
project(IntelMediaDriver)
set(MEDIA_VERSION "23.2.4${MEDIA_VERSION_EXTRA}" CACHE STRING "" FORCE)
set(MEDIA_VERSION "23.3.5${MEDIA_VERSION_EXTRA}" CACHE STRING "" FORCE)



Expand Down Expand Up @@ -56,7 +56,6 @@ cmake_dependent_option( BUILD_KERNELS
option (BUILD_CMRTLIB "Build and Install cmrtlib together with media driver" ON)

option (ENABLE_PRODUCTION_KMD "Enable Production KMD header files" OFF)
option (ENABLE_XE_KMD "Enable XE KMD header files" ON)

include(GNUInstallDirs)

Expand Down
7 changes: 4 additions & 3 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ You may obtain a copy of the License at [MIT](https://opensource.org/licenses/MI
For Ubuntu 16.04+

```
apt install autoconf libtool libdrm-dev xorg xorg-dev openbox libx11-dev libgl1-mesa-glx libgl1-mesa-dev
apt install autoconf libtool libdrm-dev xorg xorg-dev openbox libx11-dev libgl1-mesa-glx
```

Equivalents for other distributions should work.
Expand Down Expand Up @@ -108,10 +108,10 @@ Media driver supports two build types as below
| JPEG | <u>Full-Feature</u><br><i>Free-Kernel</i> | <u>D/E</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | <u>D</u><br><i>D<i> |
| VP8 | <u>Full-Feature</u><br><i>Free-Kernel</i> | <u>D</u><br><i>D<i> | <u>&nbsp;</u><br><i>&nbsp;<i> | <u>&nbsp;</u><br><i>&nbsp;<i> | <u>D*</u><br><i>D*<i> | <u>D</u><br><i>D<i> | <u>D/Es</u><br><i>D<i> | <u>D/Es</u><br><i>D<i> | <u>D</u><br><i>D<i> | <u>D</u><br><i>D<i> | <u>D</u><br><i>D<i> |
| HEVC 8bit | <u>Full-Feature</u><br><i>Free-Kernel</i> | <u>D/E</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | <u>D/E/Es</u><br><i>D/E<i> | <u>D/E/Es</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | <u>D/E/Es</u><br><i>D/E<i> | <u>D/Es</u><br><i>D<i> | <u>D/Es</u><br><i>D<i> | <u>D/Es</u><br><i>D<i> | |
| HEVC 8bit 422 | <u>Full-Feature</u><br><i>Free-Kernel</i> | <u>D</u><br><i>D<i>| <u>D</u><br><i>D<i> | <u>D/Es</u><br><i>D<i> | <u>D/Es</u><br><i>D<i> | <u>D</u><br><i>D<i> | <u>D/Es</u><br><i>D<i> | | | | |
| HEVC 8bit 422 | <u>Full-Feature</u><br><i>Free-Kernel</i> | <u>D</u><br><i>D<i>| <u>D/E</u><br><i>D/E<i> | <u>D/Es</u><br><i>D<i> | <u>D/Es</u><br><i>D<i> | <u>D</u><br><i>D<i> | <u>D/Es</u><br><i>D<i> | | | | |
| HEVC 8bit 444 | <u>Full-Feature</u><br><i>Free-Kernel</i> | <u>D/E</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | | | | |
| HEVC 10bit | <u>Full-Feature</u><br><i>Free-Kernel</i> | <u>D/E</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | <u>D/E/Es</u><br><i>D/E<i> | <u>D/E/Es</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | <u>D/E/Es</u><br><i>D/E<i> | <u>D/Es</u><br><i>D<i> | <u>D</u><br><i>D<i> | | |
| HEVC 10bit 422 | <u>Full-Feature</u><br><i>Free-Kernel</i> | <u>D</u><br><i>D<i> | <u>D</u><br><i>D<i> | <u>D/Es</u><br><i>D<i> | <u>D/Es</u><br><i>D<i> | <u>D</u><br><i>D<i> | <u>D/Es</u><br><i>D<i> | | | | |
| HEVC 10bit 422 | <u>Full-Feature</u><br><i>Free-Kernel</i> | <u>D</u><br><i>D<i> | <u>D/E</u><br><i>D/E<i> | <u>D/Es</u><br><i>D<i> | <u>D/Es</u><br><i>D<i> | <u>D</u><br><i>D<i> | <u>D/Es</u><br><i>D<i> | | | | |
| HEVC 10bit 444 | <u>Full-Feature</u><br><i>Free-Kernel</i> | <u>D/E</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | <u>D/E</u><br><i>D/E<i> | | | | |
| HEVC 12bit | <u>Full-Feature</u><br><i>Free-Kernel</i> | <u>D</u><br><i>D<i> | <u>D</u><br><i>D<i> | <u>D/Es</u><br><i>D<i> | <u>D/Es</u><br><i>D<i> | | | | | | |
| HEVC 12bit 422 | <u>Full-Feature</u><br><i>Free-Kernel</i> | <u>D</u><br><i>D<i> | <u>D</u><br><i>D<i> | <u>D</u><br><i>D<i> | <u>D</u><br><i>D<i> | | | | | | |
Expand All @@ -131,6 +131,7 @@ Media driver supports two build types as below
- E - Hardware Encoding, Low Power Encoding(VDEnc/Huc)
- Es - Hardware(PAK) + Shader(media kernel+VME) Encoding

***Note:*** Low Power Encoding(VAEntrypointEncSliceLP) and Shader Encoding(VAEntrypointEncSlice) are consolidated to the unified interface(VAEntrypointEncSlice) from ***MTL*** platform. It goes through VDEnc/Huc for HW acceleration to unleash GPU resource to customers.


For more decoding and encoding features information, please refer to
Expand Down
8 changes: 8 additions & 0 deletions Tools/MediaDriverTools/GenKrnBin/main.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -434,11 +434,19 @@ void ConcatenateKernelBinary(char *pKernelName, bool bVerbose)
// no data to read - EOF
if (dwBytesRead == 0)
{
if (iBuffLeft > 4)
{
fprintf(stderr, "Hex file %s is not 32 bytes aligned. Left %d bytes not processed. May have critical issue!!!\n", pKernelName, iBuffLeft);
}
iBuffLeft = -1;
}
}
else
{
if (iBuffLeft > 4)
{
fprintf(stderr, "Hex file %s is not 32 bytes aligned. Left %d bytes not processed. May have critical issue!!!\n", pKernelName, iBuffLeft);
}
iBuffLeft = -1;
}
}
Expand Down
5 changes: 3 additions & 2 deletions media_common/agnostic/common/codec/shared/codec_def_common.h
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2022, Intel Corporation
* Copyright (c) 2017-2023, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
Expand Down Expand Up @@ -408,7 +408,8 @@ typedef enum _CODECHAL_STATUS
* Only error reporting parameters in the status reporting structure will be valid. This status will be returned if the workload(s) for the picture in question resulted in a HW hang or HW status indicators indicate a failure.
*/
CODECHAL_STATUS_ERROR = 2,
CODECHAL_STATUS_UNAVAILABLE = 3 //!< Indicates that the entry in the status reporting array was not used
CODECHAL_STATUS_UNAVAILABLE = 3, //!< Indicates that the entry in the status reporting array was not used
CODECHAL_STATUS_RESET = 4 //!< Indicates that Media Reset happend
} CODECHAL_STATUS, *PCODECHAL_STATUS;

typedef enum _CODECHAL_CHROMA_SITING_TYPE
Expand Down
85 changes: 79 additions & 6 deletions media_common/agnostic/common/codec/shared/codec_def_encode_av1.h
Original file line number Diff line number Diff line change
Expand Up @@ -96,6 +96,72 @@ typedef enum
AV1_ENCODED_BIT_DEPTH_10 = 1
} AV1_ENCODED_BIT_DEPTH;

typedef enum //VDEnc Frame Types
{
AV1_I_FRAME = 0, // I (Intra)
AV1_P_FRAME = 1, // P (Inter/Pred)
AV1_B_FRAME = 2, // B (BiPred/Random Access)
AV1_GPB_FRAME = 3, // B (GPB/LowDelay)
} VDEncFrameType;

enum TABLE_A1_COLS_INDEX
{
MAX_PIC_SIZE_INDEX = 0,
MAX_H_SIZE_INDEX,
MAX_V_SIZE_INDEX,
MAX_DISPLAY_RATE_INDEX,
MAX_DECODE_RATE_INDEX,
TABLE_A1_COLS_NUM,
};

enum TABLE_A2_COLS_INDEX
{
MAX_HEADER_RATE_INDEX = 0,
MAIN_BPS_INDEX,
HIGH_BPS_INDEX,
MAIN_CR_INDEX,
HIGH_CR_INDEX,
MAX_TILES_INDEX,
MAX_TILE_COLS_INDEX,
TABLE_A2_COLS_NUM,
};
const uint64_t TableA1[][TABLE_A1_COLS_NUM] =
{
// Level |MaxPicSize | MaxHSize | MaxVSize | MaxDiaplayRate | MaxDecodeRate
/* 2.0 */ {147456, 2048, 1152, 4423680, 5529600},
/* 2.1 */ {278784, 2816, 1584, 8363520, 10454400},
/* 3.0 */ {665856, 4352, 2448, 19975680, 24969600},
/* 3.1 */ {1065024, 5504, 3096, 31950720, 39938400},
/* 4.0 */ {2359296, 6144, 3456, 70778880, 77856768},
/* 4.1 */ {2359296, 6144, 3456, 141557760, 155713536},
/* 5.0 */ {8912896, 8192, 4352, 267386880, 273705200},
/* 5.1 */ {8912896, 8192, 4352, 534773760, 547430400},
/* 5.2 */ {8912896, 8192, 4352, 1069547520, 1094860800},
/* 5.3 */ {8912896, 8192, 4352, 1069547520, 1176502272},
/* 6.0 */ {35651584, 16384, 8704, 1069547520, 1176502272},
/* 6.1 */ {35651584, 16384, 8704, 2139095040, 2189721600},
/* 6.2 */ {35651584, 16384, 8704, 4278190080, 4379443200},
/* 6.3 */ {35651584, 16384, 8704, 4278190080, 4706009088},
};
const uint32_t TableA2[][TABLE_A2_COLS_NUM] =
{
// Level | MaxHeaderRate | Mainbps | Highbps | MainCR | HighCR | MaxTiles | MaxTileCols
/* 2.0 */ {150, 1500000, 0, 2, 0, 8, 4},
/* 2.1 */ {150, 3000000, 0, 2, 0, 8, 4},
/* 3.0 */ {150, 6000000, 0, 2, 0, 16, 6},
/* 3.1 */ {150, 10000000, 0, 2, 0, 16, 6},
/* 4.0 */ {300, 12000000, 30000000, 4, 4, 32, 8},
/* 4.1 */ {300, 20000000, 50000000, 4, 4, 32, 8},
/* 5.0 */ {300, 30000000, 100000000, 6, 4, 64, 8},
/* 5.1 */ {300, 40000000, 160000000, 8, 4, 64, 8},
/* 5.2 */ {300, 60000000, 240000000, 8, 4, 64, 8},
/* 5.3 */ {300, 60000000, 240000000, 8, 4, 64, 8},
/* 6.0 */ {300, 60000000, 240000000, 8, 4, 128, 16},
/* 6.1 */ {300, 100000000, 480000000, 8, 4, 128, 16},
/* 6.2 */ {300, 160000000, 800000000, 8, 4, 128, 16},
/* 6.3 */ {300, 160000000, 800000000, 8, 4, 128, 16},
};

//DDI version 0.20
typedef struct _CODEC_AV1_ENCODE_SEQUENCE_PARAMS
{
Expand Down Expand Up @@ -149,12 +215,19 @@ typedef struct _CODEC_AV1_ENCODE_SEQUENCE_PARAMS
{
struct
{
uint32_t enable_order_hint : 1;
uint32_t enable_superres : 1;
uint32_t enable_cdef : 1;
uint32_t enable_restoration : 1;
uint32_t enable_warped_motion : 1; //[0]
uint32_t Reserved3 : 27;
uint32_t enable_order_hint : 1;
uint32_t enable_superres : 1;
uint32_t enable_cdef : 1;
uint32_t enable_restoration : 1;
uint32_t enable_warped_motion : 1; //[0]
uint32_t enable_filter_intra : 1;
uint32_t enable_intra_edge_filter : 1;
uint32_t enable_interintra_compound : 1;
uint32_t enable_masked_compound : 1;
uint32_t enable_dual_filter : 1;
uint32_t enable_jnt_comp : 1;
uint32_t enable_ref_frame_mvs : 1;
uint32_t Reserved3 : 20;
} fields;
uint32_t value;
} CodingToolFlags;
Expand Down
12 changes: 0 additions & 12 deletions media_common/agnostic/common/codec/shared/codec_def_encode_hevc.h
Original file line number Diff line number Diff line change
Expand Up @@ -106,18 +106,6 @@ enum HEVC_BRC_FRAME_TYPE
HEVC_BRC_FRAME_TYPE_INVALID
};

//!
//! \enum HEVC_PYRAMID_LAYER_NUM
//!
enum HEVC_PYRAMID_LAYER_NUM
{
HEVC_PYRAMID_LAYER_NUM_0 = 0,
HEVC_PYRAMID_LAYER_NUM_1 = 1,
HEVC_PYRAMID_LAYER_NUM_2 = 2,
HEVC_PYRAMID_LAYER_NUM_3 = 3,
HEVC_PYRAMID_LAYER_NUM_4 = 4
};

typedef enum
{
ENCODE_HEVC_BIT_DEPTH_8 = 0,
Expand Down
3 changes: 3 additions & 0 deletions media_common/agnostic/common/hw/mhw_mi.h
Original file line number Diff line number Diff line change
Expand Up @@ -45,6 +45,8 @@ class MhwCpInterface;
#define MHW_MI_ENCODER_4K_WATCHDOG_THRESHOLD_IN_MS 100
#define MHW_MI_ENCODER_FHD_WATCHDOG_THRESHOLD_IN_MS 50
#define MHW_MI_DECODER_720P_WATCHDOG_THRESHOLD_IN_MS 10
#define MHW_MI_DECODER_4K_WATCHDOG_THRESHOLD_IN_MS 20
#define MHW_MI_DECODER_8K_WATCHDOG_THRESHOLD_IN_MS 60
#define MHW_MI_DECODER_16K_WATCHDOG_THRESHOLD_IN_MS 180
#define MHW_MI_DECODER_16Kx16K_WATCHDOG_THRESHOLD_IN_MS 256
#define MHW_MI_WATCHDOG_COUNTS_PER_MILLISECOND (19200123 / 1000) // Time stamp counts per millisecond
Expand Down Expand Up @@ -177,6 +179,7 @@ typedef struct _MHW_PIPE_CONTROL_PARAMS
uint32_t bInvalidateTextureCache : 1;
uint32_t bGenericMediaStateClear : 1;
uint32_t bIndirectStatePointersDisable : 1;
uint32_t bUnTypedDataPortCacheFlush : 1;
uint32_t bHdcPipelineFlush : 1;
uint32_t bKernelFenceEnabled : 1;
uint32_t bPPCFlush : 1;
Expand Down
1 change: 1 addition & 0 deletions media_common/agnostic/common/hw/mhw_render.h
Original file line number Diff line number Diff line change
Expand Up @@ -289,6 +289,7 @@ typedef struct _MHW_GPGPU_WALKER_PARAMS
uint32_t IndirectDataLength;
uint32_t IndirectDataStartAddress;
uint32_t BindingTableID;
uint32_t ForcePreferredSLMZero;
} MHW_GPGPU_WALKER_PARAMS, *PMHW_GPGPU_WALKER_PARAMS;

typedef struct _MHW_MEDIA_OBJECT_PARAMS
Expand Down
1 change: 1 addition & 0 deletions media_common/agnostic/common/os/mos_oca_defs.h
Original file line number Diff line number Diff line change
Expand Up @@ -52,6 +52,7 @@ typedef enum _MOS_OCA_LOG_TYPE
MOS_OCA_LOG_TYPE_CODECHAL_PARAM,
MOS_OCA_LOG_TYPE_EXEC_LIST_INFO,
MOS_OCA_LOG_TYPE_VP_USER_FEATURE_CONTROL_INFO,
MOS_OCA_LOG_TYPE_CP_IOMSG,
MOS_OCA_LOG_TYPE_COUNT
}MOS_OCA_LOG_TYPE;

Expand Down
29 changes: 29 additions & 0 deletions media_common/agnostic/common/os/mos_oca_interface.h
Original file line number Diff line number Diff line change
Expand Up @@ -249,6 +249,35 @@ class MosOcaInterface
return nullptr;
}

//!
//! \brief Insert OCA buffer handle into m_hOcaMap
//! \param [in] key
//! The key of m_hOcaMap.
//! \param [in] handle
//! Oca buffer handle.
//! \return MOS_STATUS
//! Return MOS_STATUS_SUCCESS if insert successfully, otherwise insert failed.
//!
virtual MOS_STATUS InsertOcaBufHandleMap(uint32_t *key, MOS_OCA_BUFFER_HANDLE handle) = 0;

//!
//! \brief Remove OCA buffer handle from m_hOcaMap
//! \param [in] key
//! The key of m_hOcaMap.
//! \return MOS_STATUS
//! Return MOS_STATUS_SUCCESS if erase successfully, otherwise erase failed.
//!
virtual MOS_STATUS RemoveOcaBufHandleFromMap(uint32_t *key) = 0;

//!
//! \brief Get OCA buffer handle from m_hOcaMap
//! \param [in] key
//! The key of m_hOcaMap.
//! \return MOS_OCA_BUFFER_HANDLE
//! Return oca buffer handle.
//!
virtual MOS_OCA_BUFFER_HANDLE GetOcaBufHandleFromMap(uint32_t *key) = 0;

//!
//! \brief Get OCA status.
//! \return MOS_STATUS
Expand Down
5 changes: 3 additions & 2 deletions media_common/agnostic/common/os/mos_oca_rtlog_mgr_defs.h
Original file line number Diff line number Diff line change
Expand Up @@ -39,8 +39,9 @@ enum MOS_OCA_RTLOG_COMPONENT_TPYE
};

#define MOS_OCA_RTLOG_MAGIC_NUM 0x494D5445
#define MAX_OCA_RT_SUB_SIZE 0x1000
#define MAX_OCA_RT_SIZE (MAX_OCA_RT_SUB_SIZE * MOS_OCA_RTLOG_COMPONENT_MAX)
#define MAX_OCA_RT_SUB_SIZE 0x100
#define MAX_OCA_RT_COMMON_SUB_SIZE 0x3D00
#define MAX_OCA_RT_SIZE (MAX_OCA_RT_SUB_SIZE * (MOS_OCA_RTLOG_COMPONENT_MAX-1) + MAX_OCA_RT_COMMON_SUB_SIZE)
#define MAX_OCA_RT_POOL_SIZE (MAX_OCA_RT_SIZE + MOS_PAGE_SIZE)
#define MOS_OCA_RTLOG_MAX_PARAM_COUNT 1
// sizeof(int32_t)+sizeof(int64_t) is the size of MT_PARAM
Expand Down
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