Test failures in Vector Unit stride LOAD and STORE Instructions

[ahadali-10x]

Test failures in Vector Unit stride LOAD and STORE Instructions

Description:

Tests for the unit load and store instructions for EEW=8, 16, 32, 64 are added. These tests cover different test cases for load store instructions and all passed on spike. 2 test cases are failing for both vle and vse on rtl:

1. If we set vl=0 by passing avl=0, no memory operation should be performed but it hangs during the execution of test
2. If we set non zero vstart value, it should start execution from element number given in vstart and perform memory operations on all elements till vl but it start execution from element number given in vstart and produce false result for remaining elements

Failing tests:

vle8
vle16
vle32
vle64
vse8
vse16
vse32
vse64

Verification branch: vle_vse_tests

Steps to recreate this issue:

1. git clone https://github.com/pulp-platform/ara.git
2. git remote add test_repo "https://github.com/10x-Engineers/ara"
3. git fetch test_repo
4. git checkout vle_vse_tests
5. cd apps
6. make riscv_tests
7. cd ../hardware
8. make simv app=rv64uv-ara-vle8
9. make simv app=rv64uv-ara-vle16
10. make simv app=rv64uv-ara-vle32
11. make simv app=rv64uv-ara-vle64
12. make simv app=rv64uv-ara-vse8
13. make simv app=rv64uv-ara-vse16
14. make simv app=rv64uv-ara-vse32
15. make simv app=rv64uv-ara-vse64

[ahadali-10x]

Issue updated after adding tests of unit stride load store instructions for EEW = 16, 32, 64.