opcodes-xpulpbitop_CUSTOM

# Xpulp extension subset: bit manipulation operations & general ALU operations

# format of a line in this file:
# <instruction name> <args> <opcode>
#
# <opcode> is given by specifying one or more range/value pairs:
# hi..lo=value or bit=value or arg=value (e.g. 6..2=0x45 10=1 rd=0)
#
# <args> is one of rd, rs1, rs2, rs3, aqrl, fm, pred, succ, rm,
# funct3, imm20, jimm20, imm12, imm12hi, bimm12hi, imm12lo,
# bimm12lo, zimm, shamt, shamtw, imm5, imm6, vd, vs3, vs1, vs2,
# vm, wd, amoop, nf, simm5, zimm11, prs3, L, uimms, Luimm5,
# vseglen, stagger_max, stagger_mask

# INFO: overlaps with opcodes-rvv, opcodes-rv32b_CUSTOM
# INFO: this is a superset of opcodes-xpulpbitopsmall_CUSTOM

p.exths  rd rs1      31..25=8  24..20=0 14..12=4 6..2=0x0C 1..0=3
p.exthz  rd rs1      31..25=8  24..20=0 14..12=5 6..2=0x0C 1..0=3
p.extbs  rd rs1      31..25=8  24..20=0 14..12=6 6..2=0x0C 1..0=3
p.extbz  rd rs1      31..25=8  24..20=0 14..12=7 6..2=0x0C 1..0=3

p.extract    rd rs1 Luimm5 imm5   31..30=3 14..12=0 6..2=0x0C 1..0=3
p.extractr   rd rs1 rs2  31..30=2 29..25=0 14..12=0 6..2=0x0C 1..0=3
p.extractu   rd rs1 Luimm5 imm5   31..30=3 14..12=1 6..2=0x0C 1..0=3
p.extractur  rd rs1 rs2  31..30=2 29..25=0 14..12=1 6..2=0x0C 1..0=3
p.insert     rd rs1 Luimm5 imm5   31..30=3 14..12=2 6..2=0x0C 1..0=3
p.insertr    rd rs1 rs2  31..30=2 29..25=0 14..12=2 6..2=0x0C 1..0=3
p.bset       rd rs1 Luimm5 imm5   31..30=3 14..12=4 6..2=0x0C 1..0=3
p.bsetr      rd rs1 rs2  31..30=2 29..25=0 14..12=4 6..2=0x0C 1..0=3
p.bclr       rd rs1 Luimm5 imm5   31..30=3 14..12=3 6..2=0x0C 1..0=3
p.bclrr      rd rs1 rs2  31..30=2 29..25=0 14..12=3 6..2=0x0C 1..0=3

p.cnt    rd rs1 rs2  31..25=8           14..12=3 6..2=0x0C 1..0=3
p.clb    rd rs1      31..25=8  24..20=0 14..12=2 6..2=0x0C 1..0=3
p.fl1    rd rs1      31..25=8  24..20=0 14..12=1 6..2=0x0C 1..0=3
p.ff1    rd rs1      31..25=8  24..20=0 14..12=0 6..2=0x0C 1..0=3
p.ror    rd rs1      31..25=4  24..20=0 14..12=5 6..2=0x0C 1..0=3