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[ET-VK] Using width packed bias in conv1d op to slightly improve speed and memory. #10733

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merged 1 commit into from
May 7, 2025

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Summary: This diff changes bias tensor packing for conv1d op from channels to width packed, which reduces tensor memory footprint and reduces wasted texel fetch.

Differential Revision: D74208485

@trivedivivek trivedivivek requested a review from SS-JIA as a code owner May 6, 2025 20:15
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pytorch-bot bot commented May 6, 2025

🔗 Helpful Links

🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/10733

Note: Links to docs will display an error until the docs builds have been completed.

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@facebook-github-bot facebook-github-bot added the CLA Signed This label is managed by the Facebook bot. Authors need to sign the CLA before a PR can be reviewed. label May 6, 2025
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This pull request was exported from Phabricator. Differential Revision: D74208485

…mory. (pytorch#10733)

Summary:

This diff changes bias tensor packing for conv1d op from channels to width packed, which reduces tensor memory footprint and reduces wasted texel fetch.

Reviewed By: SS-JIA

Differential Revision: D74208485
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This pull request was exported from Phabricator. Differential Revision: D74208485

@trivedivivek trivedivivek changed the title Using width packed bias in conv1d op to slightly improve speed and memory. [ET-VK] Using width packed bias in conv1d op to slightly improve speed and memory. May 7, 2025
@trivedivivek trivedivivek merged commit fab6d7a into pytorch:main May 7, 2025
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3 participants