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draft: hexagon system emulation initial #99
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521f902
target/hexagon: Fix badva reference, delete CAUSE
androm3da 1cb87d4
target/hexagon: Add missing A_CALL attr, hintjumpr to multi_cof
androm3da 736cebe
target/hexagon: Add System/Guest register definitions
androm3da 64d2954
target/hexagon: Add some utility functions for sysemu
androm3da de05b22
target/hexagon: Make gen_exception_end_tb non-static
androm3da 31efbf2
target/hexagon: Guard system insts
androm3da 87b2699
target/hexagon: Switch to tag_ignore(), generate via get_{user,sys}_t…
androm3da 368dd86
target/hexagon: Guard system insts, switch to tag_ignore()
androm3da 8c2e641
target/hexagon: Add sysemu instructions triggering need_next_PC, mult…
androm3da ce5058f
target/hexagon: Add is_pair() method to scalars
androm3da c6fd603
gdb-xml: Add gdb-xml for hexagon sysemu
quic-mathbern e976e8e
target/hexagon: Add memory order definition
androm3da 7220f12
target/hexagon: Add a placeholder fp exception
androm3da c0bbdbd
target/hexagon: Define page size for sysemu
androm3da f18e9bd
target/hexagon: Add guest, system reg number defs
androm3da 0451994
target/hexagon: Add guest, system reg number state
androm3da b7fff0a
target/hexagon: Add TCG values for sreg, greg
androm3da 7ad9f91
target/hexagon: Add guest/sys reg writes to DC
androm3da 2809f85
target/hexagon: Add imported macro, attr defs for sysemu
androm3da ade7eec
target/hexagon: Define DC states
androm3da b961c8e
FIXME: target/hexagon: Add new macro definitions for sysemu
androm3da 7ad78ae
target/hexagon: Add handlers for guest/sysreg r/w
androm3da 79ccf99
target/hexagon: Add placeholder greg/sreg r/w helpers
androm3da e43d4f1
target/hexagon: Add vmstate representation
androm3da cd9ce8b
docs: Add hexagon sysemu docs
androm3da 8bb107c
FIXME: docs: Add hexagon VM info
androm3da 5836715
docs/system: Add hexagon CPU emulation
androm3da b894648
target/hexagon: Make A_PRIV, "J2_trap*" insts need_env()
androm3da 95f9dac
target/hexagon: Define register fields for system regs
androm3da 404f998
FIXME this unused fixes some errs
androm3da 51ddc6c
target/hexagon: Add TCG overrides for break,unpause,fetchbo,dczeroa
androm3da 3fdb2f0
target/hexagon: Implement do_raise_exception()
androm3da 46b7c36
target/hexagon: Add system reg insns
androm3da d08ab18
target/hexagon: Add sysemu TCG overrides
androm3da 903067d
target/hexagon: Add implicit attributes to sysemu macros
androm3da 49b7120
target/hexagon: Add TCG overrides for int handler insts
androm3da 17e09db
target/hexagon: Add TCG overrides for thread ctl
androm3da 560243f
target/hexagon: Add TCG overrides for rte, nmi
androm3da 0c3f47f
target/hexagon: Add sreg_{read,write} helpers
androm3da d82c776
target/hexagon: Initialize htid, modectl regs
androm3da f2e343c
target/hexagon: Add locks, id, next_PC to state
androm3da 7411a69
target/hexagon: Add a TLB count property
androm3da ad71d23
target/hexagon: Add {TLB,k0}lock, cause code, wait_next_pc
androm3da 3243399
target/hexagon: Add stubs for modify_ssr/get_exe_mode
androm3da 2ce28d3
target/hexagon: Add gdb support for sys regs
androm3da 8cc9d4a
FIXME: target/hexagon: Add initial MMU model
androm3da dbf9147
target/hexagon: Add IRQ events
androm3da 29c5a16
target/hexagon: Add clear_wait_mode() definition
androm3da 9dcba11
target/hexagon: Define f{S,G}ET_FIELD macros
androm3da edf745f
target/hexagon: Add hex_interrupts support
androm3da ea7ac92
hw/intc: Add l2vic interrupt controller
SidManning 1ed4048
target/hexagon: Implement ciad helper
androm3da 75bd590
target/hexagon: Implement {c,}swi helpers
androm3da 2af5088
target/hexagon: Implement iassign{r,w} helpers
androm3da d905f73
target/hexagon: Implement start/stop helpers
androm3da a7f2da3
target/hexagon: Implement modify SSR
androm3da f700155
target/hexagon: Implement {g,s}etimask helpers
androm3da 6a9cc68
target/hexagon: Implement wait helper
androm3da b72c595
target/hexagon: Implement get_exe_mode()
androm3da 15e0625
target/hexagon: Implement arch_get_system_reg()
androm3da 9fc10a7
target/hexagon: Implement arch_{s,g}et_{thread,system}_reg()
androm3da 5026cc9
target/hexagon: Add representation to count cycles
androm3da 9c30064
target/hexagon: Add implementation of cycle counters
androm3da 209a966
target/hexagon: Implement modify_syscfg()
androm3da 5186210
target/hexagon: Add system event, cause codes
androm3da 64f749a
target/hexagon: Implement hex_tlb_entry_get_perm()
androm3da 4e99d60
target/hexagon: Implement hex_tlb_lookup_by_asid()
androm3da 14e3167
target/hexagon: Implement software interrupt
androm3da 189c35b
target/hexagon: Implement exec_interrupt, set_irq
androm3da a1e454d
FIXME: target/hexagon: Implement hexagon_tlb_fill()
androm3da 5df06af
target/hexagon: Implement siad inst
androm3da 24f2069
target/hexagon: Implement hexagon_resume_threads()
androm3da 93a8b32
target/hexagon: Implement setprio, resched
androm3da f0c8321
target/hexagon: Add sysemu_ops
androm3da ba898c1
target/hexagon: Add cpu_get_phys_page_debug()
androm3da 223548b
target/hexagon: Add vmsd
androm3da 5262161
target/hexagon: Add exec-start-addr prop
androm3da 95a2d24
target/hexagon: Add hexagon_cpu_mmu_index()
androm3da c968627
FIXME: why remove this unreachable?
androm3da 28c8c09
FIXME: target/hexagon: handle .new values
androm3da 018dcf7
target/hexagon: Decode trap1, rte as COF
androm3da 6ec1673
hw/hexagon: Add machine configs for sysemu
androm3da 9df8d78
hw/hexagon: Add support for cfgbase
SidManning 206e1cb
qapi: Add hexagon machine to QAPI
androm3da 7212626
target/hexagon: add build config for softmmu
androm3da a72e283
target/hexagon: Implement hexagon_find_last_irq()
androm3da 2d3237b
target/hexagon: Implement modify_ssr, resched, pending_interrupt
androm3da 0c23a77
target/hexagon: Add pkt_ends_tb to translation
androm3da d819f50
FIXME target/hexagon: Add next_PC, {s,g}reg writes
androm3da 4ace7fa
target/hexagon: s/pkt_has_store/pkt_has_scalar_store
androm3da aebf62b
target/hexagon: Add implicit sysreg writes
androm3da 4433c21
FIXME target/hexagon: Omit A_SCALAR_STORE from cancelled
androm3da 515be7f
target/hexagon: Define system, guest reg names
androm3da ccf017d
target/hexagon: initialize sys/guest reg TCGvs
androm3da 2163ff5
target/hexagon: Add TLB, k0 {un,}lock
androm3da 61f5ce8
FIXME target/hexagon: Define gen_precise_exception()
androm3da 4237944
target/hexagon: Add TCG overrides for transfer insts
androm3da d4d0a5f
target/hexagon: Add support for loadw_phys
androm3da ea6db76
hw/hexagon: Add v68, sa8775-cdsp0 defs
androm3da 8932b0c
hw/hexagon: Modify "Standalone" symbols
androm3da ab9a180
hw/hexagon: Define hexagon "virt" machine
androm3da 55a84e3
target/hexagon: Add guest reg reading functionality
quic-mathbern cc1b794
target/hexagon: Add pcycle setting functionality
androm3da 1dd8d5d
tests/functional: Add a hexagon minivm test
androm3da c425299
FIXME: target/hexagon: Add exit pattern for standalone programs
SidManning 3a44861
target/hexagon: Add a QTimer address prop
androm3da 3440997
hw/timer: Add QTimer device
SidManning 6f08d02
target/hexagon: Implement hexagon_read_timer()
androm3da 1298fe7
Update initialization sequence to fix l2vic interrupts
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I think the explanation could be because we want this invalid packet to raise an exception, which is more realistic regarding the real hardware, instead of assert()-ing here