DSP_DSK6416

Audio Processing Studies and Digital Communications with Digital Signal Processor TMS320C6416

Target:

Digital Signal Processor TMS320C6416

Fixed-point DSP
Instruction cycle time mín 1.39 ns
Word-lenght: 2 channels witch 16-bit each.

Development Kit TMS320C6416T DSK

CODEC: TLV320AIC23
Sampling Frequency: 8 kHz, 16 kHz, 24 kHz, 32 kHz, 44.1 kHz, 48 kHz and 96 kHz
Signal-to-noise ratio ADC 90 dBA, DAC 100 dBA (weighteid at 48 kHz)
Software Control Via TI McBSP-Compatible Multiprotocol Serial Port
Amplitude: 6 Vpp

Environment:

C Programming language: ANSI C 1989 Version
Compiler TMS320C6000 Optimizing Compiler v7.4
IDE Code Composer Studio v7
S.O. M$ Windows 10 (*nix systems requires offboard JTAG Emulator)
Target Configuration

APIs:

Chip Support Library: CSL
Board support library: BSL

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Prof Dr Fabrício Simões, thanks for the guidance!